Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 8 - Arrangements for selecting an address in a digital store
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
03/2009
03/31/2009US7512018 Column address enable signal generation circuit for semiconductor memory device
03/31/2009US7511753 Random access decoder
03/26/2009US20090080281 Negative voltage detection circuit and semiconductor integrated circuit
03/26/2009US20090080280 Electronic memory device
03/26/2009US20090080273 Semiconductor memory device having redundancy memory block and cell array structure thereof
03/26/2009US20090080271 Memory Cell, Memory Device, Device and Method of Accessing a Memory Cell
03/26/2009US20090080269 Semiconductor memory device
03/26/2009US20090080256 Flash memory device and programming method
03/25/2009EP1894202A4 Word line driver for dram embedded in a logic process
03/25/2009CN100472648C Tamper-resistant packaging and approach
03/25/2009CN100472646C Method and apparatus for standby power reduction in semiconductor devices
03/25/2009CN100472643C Memory circuit and method of generating the same
03/24/2009US7509607 Memory circuit having a crosstalk-glitch suppressor circuit and a control device for controlling an amount of suppression performed by the crosstalk-glitch suppressor circuit
03/24/2009US7509469 Semiconductor memory asynchronous pipeline
03/24/2009US7508731 Semiconductor memory device with a fixed burst length having column control unit
03/24/2009US7508730 Semiconductor memory devices having control circuitry to avoid recovering a charge pump when executing consecutive sections of a continuous operation command and methods of operating the same
03/24/2009US7508252 Semiconductor integrated circuit device
03/19/2009US20090075432 Semiconductor memory device
03/19/2009US20090073797 semiconductor memory device with control block sharing row decoders
03/19/2009US20090073796 Memory array peripheral structures and use
03/19/2009US20090073793 Semiconductor memory device and refresh method for the same
03/19/2009US20090073789 Method and apparatus for testing a memory device
03/19/2009US20090073788 Repairing Advanced-Memory Buffer (AMB) with Redundant Memory Buffer for Repairing DRAM on a Fully-Buffered Memory-Module
03/19/2009US20090073787 Method for controlling time point for data output in synchronous memory device
03/19/2009US20090073778 Semiconductor memory device
03/19/2009US20090073768 Memory with output control
03/19/2009US20090073759 Device for protecting a memory against attacks by error injection
03/19/2009US20090073745 Semiconductor integrated circuit
03/19/2009US20090073744 Semiconductor storage device
03/19/2009US20090073742 Semiconductor storage device and operating method of the same
03/19/2009DE10208716B4 Steuerschaltung für ein S-DRAM Control circuitry for a S-DRAM
03/18/2009EP1869679A4 Decoding circuit for non-binary groups of memory line drivers
03/18/2009CN101390169A Bit line precharge in embedded memory
03/18/2009CN101388236A Multi-layered memory devices
03/18/2009CN100470676C Semiconductor storage device and semiconductor storage device bit line selection method
03/18/2009CN100470668C Memory device and operation method thereof
03/17/2009US7505359 Integrated semiconductor memory device with clock generation
03/17/2009US7505358 Synchronous semiconductor memory device
03/17/2009US7505357 Column/row redundancy architecture using latches programmed from a look up table
03/17/2009US7505356 Multi-column addressing mode memory system including an integrated circuit memory device
03/17/2009US7505355 Semiconductor memory device with MOS transistors each having floating gate and control gate
03/17/2009US7505354 Word line voltage control circuit for memory devices
03/17/2009US7505353 Multi-port semiconductor memory device having variable access paths and method
03/17/2009US7505352 Parallel operational processing device
03/17/2009US7505351 Data output circuit of semiconductor memory apparatus and method of controlling the same
03/17/2009US7505344 Current sensing method and apparatus particularly useful for a memory array of cells having diode-like characteristics
03/17/2009US7505336 Method and apparatus for synchronization of row and column access operations
03/17/2009US7505321 Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same
03/17/2009US7505299 Semiconductor memory device
03/12/2009WO2008057835A3 Low voltage column decoder sharing a memory array p-well
03/12/2009US20090067278 data output circuit for semiconductor memory apparatus
03/12/2009US20090067277 Memory device command decoding system and memory device and processor-based system using same
03/12/2009US20090067276 Storing Operational Information in an Array of Memory Cells
03/12/2009US20090067271 Semiconductor device
03/12/2009US20090067270 Structure for improved memory column redundancy scheme
03/12/2009US20090067268 Apparatus and method for controlling data strobe signal
03/12/2009US20090067262 Voltage generating unit of semiconductor memory device
03/12/2009US20090067261 Multi-port memory device
03/12/2009US20090067260 Buffer control circuit of memory device
03/12/2009US20090067250 Memory devices with page buffer having dual registers and method of using the same
03/12/2009US20090067245 Semiconductor memory device provided with mos transistor having charge accumulation layer and control gate and data write method of nand flash memory
03/12/2009US20090067243 Nonvolatile semiconductor memory device and method of driving the same
03/12/2009US20090067226 Integrated circuit with phase-change memory cells and method for addressing phase-change memory cells
03/12/2009US20090067222 Semiconductor memory device
03/12/2009US20090067217 Methods for supplying power supply voltages in semiconductor memory devices and semiconductor memory devices using the same
03/12/2009US20090067215 Electric element, memory device, and semiconductor integrated circuit
03/11/2009EP2034488A1 Method to improve the performance of memory operations
03/11/2009EP1518181B1 Method and apparatus for optimizing timing for a multi-drop bus
03/11/2009CN101383184A Semiconductor memory device and data storage method
03/10/2009US7502277 Word-line driver design for pseudo two-port memories
03/10/2009US7502276 Method and apparatus for multi-word write in domino read SRAMs
03/10/2009US7502269 Semiconductor memory device capable of controlling drivability of overdriver
03/10/2009US7502267 Clock frequency doubler method and apparatus for serial flash testing
03/05/2009WO2009029094A1 Word line driver circuit with reduced leakage
03/05/2009WO2009027236A1 Shared memory
03/05/2009US20090063887 Memory module with termination component
03/05/2009US20090059713 Ram macro and timing generating circuit thereof
03/05/2009US20090059712 Output driver
03/05/2009US20090059711 Routing access with minimized bus area in multi-port memory device
03/05/2009US20090059710 Semiconductor memory device
03/05/2009US20090059709 Address replacing circuit and semiconductor memory apparatus having the same
03/05/2009US20090059708 Semiconductor integrated circuit including bank selection control block
03/05/2009US20090059707 Power saving sensing scheme for solid state memory
03/05/2009US20090059702 Sense amplifier for semiconductor memory device
03/05/2009US20090059701 Core voltage discharger and semiconductor memory device with the same
03/05/2009US20090059700 Precharge control circuit in semiconductor memory apparatus
03/05/2009US20090059696 Multi-port memory device
03/05/2009US20090059695 Semiconductor memory device and block management method of the same
03/05/2009US20090059694 Semiconductor memory device
03/05/2009US20090059692 Semiconductor memory device and operation method of the same
03/05/2009US20090059691 Semiconductor integrated circuit and multi test method thereof
03/05/2009US20090059689 Apparatus and method for transmitting/receiving signals at high speed
03/05/2009US20090059688 Single-ended read and differential write scheme
03/05/2009US20090059683 Semiconductor memory device
03/05/2009US20090059682 Semiconductor memory device having antifuse circuitry
03/05/2009US20090059680 Integrated Circuit Memory Devices That Support Selective Mode Register Set Commands
03/05/2009US20090059667 Memory cell array and non-volatile memory device
03/05/2009US20090059666 Memory cell array and non-volatile memory device
03/05/2009US20090059653 Multi-port dynamic memory methods
03/05/2009US20090059649 Semiconductor memory device and electronic apparatus
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