Patents
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Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
04/2010
04/01/2010US20100080076 Common memory device for variable device width and scalable pre-fetch and page size
04/01/2010US20100080075 Memory Device Refresh Method and Apparatus
04/01/2010US20100080067 Memory and reading method thereof
04/01/2010US20100080044 Semiconductor memory device having balancing capacitors
04/01/2010US20100080039 Nonvoltile memory device and method of driving the same
03/2010
03/31/2010CN101689396A Concurrent multiple-dimension word-addressable memory architecture
03/30/2010US7688672 Self-timed interface for strobe-based systems
03/30/2010US7688671 Semiconductor memory chip with on-die termination function
03/30/2010US7688670 Semiconductor device with improved power supply control for a plurality of memory arrays
03/30/2010US7688653 Method and system for improved efficiency of synchronous mirror delays and delay locked loops
03/30/2010US7688643 Device and method for controlling solid-state memory system
03/25/2010WO2010033317A1 Memory having self-timed bit line boost circuit and method therefor
03/25/2010WO2009155474A3 Memory cell employing reduced voltage
03/25/2010WO2009154906A3 Apparatus and method for multi-phase clock generation
03/25/2010US20100074042 Semiconductor memory device
03/25/2010US20100074041 Semiconductor device including asymmetric sense amplifier
03/25/2010US20100074037 Control voltage tracking circuits, methods for recording a control voltage for a clock synchronization circuit and methods for setting a voltage controlled delay
03/25/2010US20100074031 Test mode signal generator for semiconductor memory and method of generating test mode signals
03/25/2010US20100073988 Nonvolatile semiconductor storage device
03/25/2010US20100073986 Semiconductor memory device
03/25/2010DE112008001126T5 Verschleißausgleich Wear compensation
03/25/2010DE102009035926A1 Kompakte Speicherarrays Compact storage arrays
03/24/2010EP2165334A1 Concurrent multiple-dimension word-addressable memory architecture
03/24/2010CN101681677A Partial block erase architecture for flash memory
03/23/2010US7685393 Synchronous memory read data capture
03/23/2010US7684280 Histogram generation with banks for improved memory access performance
03/23/2010US7684279 Semiconductor memory device including distributed data input/output lines
03/23/2010US7684278 Method and apparatus for implementing FIFOs using time-multiplexed memory in an integrated circuit
03/18/2010WO2010030688A2 Dynamic real-time delay characterization and configuration
03/18/2010US20100067315 Semiconductor integrated circuit and method thereof
03/18/2010US20100067313 Memory device
03/18/2010US20100067303 Flash memory device capable of reduced programming time
03/17/2010CN101675479A Wear leveling
03/17/2010CN101673578A Semiconductor memory device and word line driving method thereof
03/16/2010US7679987 Clock circuitry for DDR-SDRAM memory controller
03/16/2010US7679986 Data latch controller of synchronous memory device
03/16/2010US7679985 Semiconductor memory device and arrangement method thereof
03/16/2010US7679984 Configurable memory data path
03/16/2010US7679983 Address path circuit with row redundant scheme
03/11/2010WO2009149061A3 Diode decoder array with non-sequential layout and methods of forming the same
03/11/2010US20100064098 Device and Method for Controlling Solid-State Memory System
03/11/2010US20100061177 Semiconductor memory device and word line driving method thereof
03/11/2010US20100061175 Circuit and method for driving word line
03/11/2010US20100061174 Y-decoder and decoding method thereof
03/11/2010US20100061172 Temperature detector in an integrated circuit
03/11/2010US20100061167 Data output circuit
03/11/2010US20100061162 Circuit and method for optimizing memory sense amplifier timing
03/11/2010US20100061161 Self Reset Clock Buffer In Memory Devices
03/11/2010US20100061159 Semiconductor memory device and driving method thereof
03/11/2010US20100061158 Low voltage sense amplifier and sensing method
03/11/2010US20100061157 Data output circuit
03/11/2010US20100061156 Method of controlling memory and memory system thereof
03/11/2010US20100061152 Method and system to access memory
03/10/2010EP1576614B1 Tamper-resistant packaging and approach
03/09/2010US7675811 Method and apparatus for DQS postamble detection and drift compensation in a double data rate (DDR) physical interface
03/09/2010US7675810 Semiconductor memory device
03/09/2010US7675808 Semiconductor device
03/09/2010US7675807 Semiconductor memory device having a word line strap structure and associated configuration method
03/09/2010US7675797 CAS latency circuit and semiconductor memory device including the same
03/09/2010US7675769 Semiconductor integrated circuit
03/09/2010US7675512 Memory circuit, display device and electronic equipment each comprising the same
03/09/2010US7675122 Semiconductor memory device
03/04/2010WO2009072103A3 Flash memory apparatus and methods using a plurality of decoding stages including optional use of concatenated bch codes
03/04/2010WO2009009865A8 Memory with data control
03/04/2010US20100054074 Voltage generation circuit and nonvolatile memory device including the same
03/04/2010US20100054073 Semiconductor memory device
03/04/2010US20100054072 Distributed block ram
03/04/2010US20100054071 Semiconductor memory device
03/04/2010US20100054066 Memory device, semiconductor memory device and control method thereof
03/04/2010US20100054060 Delay locked loop and semiconductor memory device with the same
03/04/2010US20100054059 Semiconductor memory device
03/04/2010US20100054058 Systems and methods for issuing address and data signals to a memory array
03/04/2010US20100054055 Data input/output circuit
03/04/2010US20100054052 Semiconductor memory
03/04/2010US20100054047 Semiconductor memory apparatus
03/04/2010US20100054046 Data input circuit and semiconductor memory device including the same
03/04/2010US20100054032 Row decoder for non-volatile memory devices, in particular of the phase-change type
03/04/2010US20100054031 Column decoder for non-volatile memory devices, in particular of the phase-change type
03/04/2010US20100054030 Programmable resistance memory
03/04/2010US20100054019 Resistance change memory device
03/04/2010US20100054017 Semiconductor memory device
03/04/2010US20100054013 Content addresable memory having selectively interconnected counter circuits
03/04/2010US20100052727 Synchronous semiconductor device, and inspection system and method for the same
03/03/2010EP2159800A1 Row decoder for non-volatile memory devices, in particular of the phase-change type
03/03/2010EP2159799A1 Semiconductor memory with shared global busses for reconfigurable logic device
03/02/2010US7672191 Data output control circuit
03/02/2010US7672190 Input latch circuit and method
03/02/2010US7672188 System for blocking multiple memory read port activation
03/02/2010US7672177 Memory device and method thereof
03/02/2010US7672150 Apparatus, embedded memory, address decoder, method of reading out data and method of configuring a memory
02/2010
02/25/2010US20100046314 Memory Device Having a Read Pipeline and a Delay Locked Loop
02/25/2010US20100046313 Semiconductor memory device and driving method thereof
02/25/2010US20100046292 Non-volatile memory device and bad block remapping method
02/25/2010US20100046286 Resistive memory devices using assymetrical bitline charging and discharging
02/25/2010US20100046280 SRAM Yield Enhancement by Read Margin Improvement
02/25/2010US20100046274 Resistance change memory
02/25/2010US20100046267 Memory system with sectional data lines
02/25/2010US20100046266 High Speed Memory Architecture
02/25/2010DE102008039035A1 Integrated circuit, has memory arrangement divided into plates, and word line control assigned to each plate, where part of control is arranged at edge of plate and other part of control arranged on another edge of plate
02/25/2010DE102004020546B4 Elektronische Speichervorrichtung und Verfahren zur Deaktivierung von redundanten Bit- oder Wortleitungen Electronic memory device and method for disabling redundant bit or word lines
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