Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
04/2010
04/29/2010US20100103753 Data detecting apparatus and methods thereof
04/29/2010US20100103747 Memory device and method of operating such a memory device
04/29/2010US20100103746 Multi-phase duty-cycle corrected clock signal generator and memory having same
04/29/2010US20100103745 Nand Flash Memory With a Programming Voltage Held Dynamically in a Nand Chain Channel Region
04/29/2010US20100103740 Nonvolatile Memory Device, Methods of Programming the Nonvolatile Memory Device and Memory System Including the Same
04/29/2010US20100103724 Variable Resistance memory device
04/29/2010US20100103723 Nonvolatile memory apparatus
04/29/2010DE10121649B4 Auswahlsignal-Erzeugungsschaltung mit einer Klemmschaltung zum Klemmen von Auswahlsignalen beim Einschalten Selection signal generating circuit with a clamp circuit for clamping of selection signals when switching
04/28/2010EP2180434A1 Electronic system for emulating the chain of the dna structure of a chromosome
04/28/2010EP2179420A1 Memory device with reduced buffer current during power-down mode
04/28/2010EP2179418A1 Word line driver circuit with reduced leakage
04/28/2010CN1658171B Faster write operations to nonvolatile memory by manipulation of frequently accessed sectors
04/28/2010CN1491417B Programmable switch element and method for programming the transistor to programmable switch
04/27/2010US7707355 Memory system for selectively transmitting command and address signals
04/27/2010US7706210 Semiconductor memory device including delay locked loop and method for driving the same
04/27/2010US7706209 Semiconductor memory device capable of driving non-selected word lines to a variable negative potential based on a bank access operation
04/27/2010US7706208 Semiconductor memory device
04/27/2010US7706207 Memory with level shifting word line driver and method thereof
04/27/2010US7706197 Storage device and control method of storage device
04/27/2010US7706183 Read mode for flash memory
04/22/2010US20100097878 User selectable banks for dram
04/22/2010US20100097871 Redundant memory array for replacing memory sections of main memory
04/22/2010US20100097870 Semiconductor memory device for controlling operation of delay-locked loop circuit
04/22/2010US20100097868 Distributed write data drivers for burst access memories
04/22/2010US20100097865 Data transmission circuit and a semiconductor integrated circuit using the same
04/22/2010US20100097853 Jeet memory cell
04/22/2010US20100097831 Iterative serial content addressable memory
04/22/2010DE10236696B4 Taktsynchrone Halbleiterspeichervorrichtung Synchronous semiconductor memory device
04/22/2010DE10020554B4 Halbleiterspeicherbauelement mit Spaltenauswahlschaltung und Aufbauverfahren hierfür A semiconductor memory device comprising column selection circuit structure and method therefor
04/21/2010CN1652250B Redundancy relieving circuit
04/20/2010USRE41245 Semiconductor memory device
04/20/2010US7701802 Circuits to delay a signal from a memory device
04/20/2010US7701801 Programmable pulsewidth and delay generating circuit for integrated circuits
04/20/2010US7701800 Multi-port memory device with serial input/output interface
04/20/2010US7701799 Semiconductor device
04/15/2010WO2010042496A2 Stacked device remapping and repair
04/15/2010US20100095058 Integrated circuit random access memory capable of automatic internal refresh of memory array
04/15/2010US20100091602 Address counting circuit and semiconductor memory apparatus using the same
04/15/2010US20100091601 Circuit and methods for eliminating skew between signals in semicoductor integrated circuit
04/15/2010US20100091600 Circuit and method for sampling valid command using extended valid address window in double pumped address scheme memory device
04/15/2010US20100091599 Semiconductor memory apparatus
04/15/2010US20100091598 Semiconductor memory apparatus
04/15/2010US20100091595 Integrated circuit with control circuit for performing retention test
04/15/2010US20100091594 Semiconductor memory for disconnecting a bit line from sense amplifier in a standby period and memory system including the semiconductor memory
04/15/2010US20100091593 Semiconductor memory device including signal controller connected between memory blocks
04/15/2010US20100091592 Clock buffer and a semiconductor memory apparatus using the same
04/15/2010US20100091591 Data strobe signal generating device and a semiconductor memory apparatus using the same
04/15/2010US20100091589 Semiconductor memory device
04/15/2010US20100091588 Memory device and memory system comprising a memory device and a memory control device
04/15/2010US20100091587 Device selection circuit and method
04/15/2010US20100091586 Techniques for simultaneously driving a plurality of source lines
04/15/2010US20100091585 Static random access memories and access methods thereof
04/15/2010US20100091582 Architecture and method for memory programming
04/15/2010US20100091581 Memory device and method of operating such a memory device
04/15/2010US20100091552 Nonvolatile memory device using variable resistive element
04/15/2010US20100091545 Electically programmable fuse bit
04/15/2010US20100091541 Stacked memory device and method thereof
04/15/2010US20100091540 Memory module decoder
04/15/2010US20100091537 Multi-die memory device
04/15/2010DE19654577B4 Verfahren zum Ansteuern von Wortleitungen in Halbleiter-Speichervorrichtungen A method of driving word lines in the semiconductor memory devices
04/15/2010DE102006032132B4 Schaltung und Verfahren zum Treiben einer Wortleitung eines Speicherbauelements Circuit and method for driving a word line of a memory device
04/15/2010DE10164027B4 Schaltung zum Klammern einer Wortleitungsspannung Circuit for clamping a word line voltage
04/14/2010EP2175453A1 Stacked memory device and method thereof
04/14/2010CN1989569B DRAM capable of switching between with and full density mode and operation method thereof
04/14/2010CN1581358B 存储器 Memory
04/14/2010CN101694780A Memory array structure, embedded memory and system on chip
04/14/2010CN101694779A Gating method of memory and circuit structure implementing same
04/13/2010US7697372 Access to printing material container
04/13/2010US7697371 Circuit and method for calibrating data control signal
04/13/2010US7697370 Semiconductor memory device using modulation clock signal and method for operating the same
04/13/2010US7697366 Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers
04/13/2010US7697365 Sub volt flash memory system
04/13/2010US7697364 Memory architecture having multiple partial wordline drivers and contacted and feed-through bitlines
04/13/2010US7697363 Memory device having data input and output ports and memory module and memory system including the same
04/13/2010US7697362 Arbitration for memory device with commands
04/13/2010US7696972 Single clock driven shift register and driving method for same
04/08/2010WO2010039896A2 Volatile memory elements with soft error upset immunity
04/08/2010US20100085830 Sequencing Decoder Circuit
04/08/2010US20100085828 Method for Reducing Leakage Current of a Memory and Related Device
04/08/2010US20100085825 Stacked device remapping and repair
04/08/2010US20100085823 Optimizing Sram Performance over Extended Voltage or Process Range Using Self-Timed Calibration of Local Clock Generator
04/08/2010US20100085819 Burst length control circuit and semiconductor memory device using the same
04/08/2010US20100085817 Semiconductor memory device to reduce off-current in standby mode
04/08/2010US20100085815 Command Generation circuit and semiconductor memory device
04/08/2010US20100085805 Magnetic random access memory (mram) utilizing magnetic flip-flop structures
04/08/2010US20100085804 Semiconductor memory device and data processing system including the same
04/08/2010DE10217290B4 Verfahren zum Schreiben in einen RAM mit Spaltenlöschung Method of writing into RAM columns deletion
04/08/2010DE102007028802B4 Integrierte Logikschaltung und Verfahren zum Herstellen einer integrierten Logikschaltung Integrated logic circuit and method of fabricating an integrated logic circuit
04/08/2010DE10110624B4 Integrierter Speicher mit mehreren Speicherbereichen Integrated memory having a plurality of storage areas
04/07/2010CN1707697B Method for programming a memory arrangement and programmed memory arrangement
04/06/2010US7693554 Method for operating a data storage medium
04/06/2010US7693004 Semiconductor memory device
04/06/2010US7693003 Semiconductor package
04/06/2010US7693001 SRAM split write control for a delay element
04/06/2010US7693000 Semiconductor device
04/06/2010US7692974 Memory cell, memory device, device and method of accessing a memory cell
04/06/2010US7692966 Nonvolatile semiconductor memory device having assist gate
04/06/2010US7692952 Nanoscale wire coding for stochastic assembly
04/06/2010US7692947 Nonvolatile ferroelectric memory and control device using the same
04/06/2010US7692942 Semiconductor memory apparatus
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