Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
07/1999
07/07/1999EP0928002A1 Dual memory for digital signal processor
07/07/1999EP0561271B1 Microcomputer comprising a random access memory and a nonvolatile flash memory
07/07/1999CN1222236A Signal processing system and method with rom storing instructions encoded for reducing power consumption during reads
07/06/1999US5920885 Dynamic random access memory with a normal precharge mode and a priority precharge mode
07/06/1999US5920536 Method and apparatus for holographic data storage system
07/06/1999US5920519 Semiconductor memory with sensing stability
07/06/1999US5920518 Synchronous clock generator including delay-locked loop
07/06/1999US5920517 Memory array test and characterization using isolated memory cell power supply
07/06/1999US5920514 Memory device with efficient redundancy using sense amplifiers
07/06/1999US5920511 High-speed data input circuit for a synchronous memory device
07/06/1999US5920510 Semiconductor device capable of holding signals independent of the pulse width of an external clock and a computer system including the semiconductor device
07/06/1999US5920409 Optoelectronic devices using persistent photoconductivity
07/06/1999US5920272 Record carrier containing a signal having a sequence of successive information signal portions
07/06/1999US5920223 Method and apparatus to improve immunity to common-mode noise
07/06/1999US5920208 Power down circuit and method of sense amplifier
07/06/1999US5920096 Electrostatic discharge protection systems and methods for electronic tokens
07/01/1999WO1999033058A1 Method and system for processing pipelined memory commands
07/01/1999DE19860650A1 Chip set memory control device with data extraction masking function
06/1999
06/30/1999EP0926684A1 Synchronisation device for synchronous dynamic random-access memory
06/30/1999EP0926683A2 Semiconductor memory
06/30/1999EP0926682A2 Multiple bank memory
06/30/1999EP0925665A2 Method of cryptological authentification in a scanning identification system
06/30/1999EP0925551A1 Method for tuning an oscillating receiver circuit of a transponder built into a rfid system
06/30/1999EP0925548A1 Data transfer method for a scanning identification system
06/30/1999EP0925178A1 Memory device using movement of protons
06/30/1999CN1221191A Synchronization device for synchronous dynamic random-access memory
06/29/1999US5917773 Apparatus and method for writing to multiple addresses
06/29/1999US5917772 Data input circuit for eliminating idle cycles in a memory device
06/29/1999US5917771 Register bank bit lines
06/29/1999US5917768 Memory architecture for flexible reading management, particularly for non-volatile memories, having noise-immunity features, matching device performance, and having optimized throughout
06/29/1999US5917762 Method for delaying a signal
06/29/1999US5917761 Synchronous memory interface
06/29/1999US5917760 De-skewing data signals in a memory system
06/29/1999US5917759 Input interface level determiner for use in a memory device
06/29/1999US5917753 Sensing circuitry for reading and verifying the contents of electrically programmable/erasable non-volatile memory cells
06/29/1999US5917745 Semiconductor memory device
06/29/1999US5917744 Semiconductor memory having hierarchical bit line architecture with interleaved master bitlines
06/29/1999US5917353 Clock pulse extender mode for clocked memory devices having precharged data paths
06/29/1999US5917345 Drive signal generating circuit for sense amplifier
06/29/1999US5917339 For managing mixed voltages in a semiconductor device
06/24/1999WO1999031711A2 Precharge circuit for semiconductor memory device
06/24/1999WO1999031670A2 A symmetric segmented memory array architecture
06/24/1999WO1999031666A1 High speed, noise immune, single ended sensing scheme for non-volatile memories
06/24/1999WO1999031665A1 Memory addressing
06/23/1999EP0924710A2 Memory array with reduced charging current
06/23/1999EP0924709A2 Semiconductor memory
06/23/1999EP0924708A2 MPEG portable sond reproducing system and a reproducing method thereof
06/23/1999EP0924707A2 Synchronous dynamic random access memory architecture for sequential burst mode
06/23/1999EP0924598A2 Content addressable memory fifo with and without purging
06/23/1999CN2325854Y Intelligent card type reading and writing device
06/23/1999CN1220466A Semiconductor memory having hierarchical bit line and/or word line architecture
06/23/1999CN1220464A Semiconductor memory having hierarchical bitline architecture with interleaved master bitlines
06/22/1999US5915105 Memory device
06/22/1999US5915084 Scannable sense amplifier circuit
06/22/1999US5914910 Semiconductor memory and method of using the same column decoder and image processor
06/22/1999US5914909 Semiconductor memory device capable of driving the data bus sense amplifier in both read and write modes
06/22/1999US5914906 Field programmable memory array
06/22/1999US5914903 Semiconductor memory device
06/22/1999US5914900 Circuits, systems and methods for modifying data stored in a memory using logic operations
06/22/1999US5914899 Semiconductor memory having a page mode in which previous data in an output circuit is reset before new data is supplied
06/22/1999US5914898 Memory device and system with leakage blocking circuitry
06/22/1999US5914897 FIFO memory device having address detection portion
06/22/1999US5914624 Skew logic circuit device
06/22/1999US5914543 Systems and methods for memory control
06/22/1999US5914505 Semiconductor integrated circuit
06/17/1999WO1999030368A1 High sensitivity active pixel with electronic shutter
06/16/1999EP0923082A2 Semiconductor memory having a sense amplifier
06/16/1999EP0923080A2 Burst length discriminating circuit for use in synchronous semiconductor memory with burst mode
06/16/1999EP0839375B1 Pipelined address memory system and method of operating such system
06/16/1999CN1219739A Burst length discriminating circuit
06/16/1999CN1043695C 半导体存储装置 The semiconductor memory device
06/15/1999US5913046 Method for performing data transfer operations
06/15/1999US5912899 Integrated memory device
06/15/1999US5912860 For an array of memory cells
06/15/1999US5912858 Clock-synchronized input circuit and semiconductor memory device that utilizes same
06/15/1999US5912855 Power up initialization circuit responding to an input signal
06/15/1999US5912854 Data processing system arranged for operating synchronously with a high speed memory
06/15/1999US5912853 Precision sense amplifiers and memories, systems and methods using the same
06/15/1999US5912849 Semiconductor memory device
06/15/1999US5912847 Semiconductor memory device having a save register for read data
06/15/1999US5912846 Memory device
06/15/1999US5912838 Apparatus for reading state of multistate non-volatile memory cells
06/10/1999WO1999028913A1 A method and apparatus for dynamically placing portions of a memory in a reduced power consumption state
06/09/1999EP0920699A1 Antifuse detect circuit
06/09/1999CN1218960A Semiconductor memory of graded position line structure with uneven local position line
06/08/1999US5911031 IC card memory for recording and reproducing audio and/or video data concurrently or separately and a control method thereof
06/08/1999US5910927 Memory device and sense amplifier control device
06/08/1999US5910926 Apparatus and method for a dynamic random access architecture
06/08/1999US5910920 High speed input buffer
06/08/1999US5910919 Circuits, systems and methods for modifying data stored in a memory using logic operations
06/08/1999US5910917 Multi-chip IC memory device with a single command controller and signal clock generator
06/03/1999WO1999027650A1 Method, system, and device for accumulating data and maintaining the accumulated data
06/03/1999WO1999027538A1 Zero power high speed configuration memory
06/03/1999CA2278615A1 Zero power high speed configuration memory
06/02/1999EP0920057A2 Secure integrated chip with conductive shield
06/02/1999EP0920028A1 Semiconductor integrated circuit device
06/02/1999EP0920024A2 Semiconductor memory device having a plurality of banks
06/02/1999EP0868725B1 Method of operating an sram mos transistor storage cell
06/02/1999EP0823116B1 Circuits, systems and methods for modifying data stored in a memory using logic operations
06/02/1999EP0784851B1 Circuits, systems and methods for improving page accesses and block transfers in a memory system