Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
01/2006
01/10/2006US6985468 Memory circuit and coherent detection circuit
01/10/2006US6985401 Memory device having delay locked loop
01/10/2006US6985399 Main word line driver circuit receiving negative voltage in semiconductor memory device
01/10/2006US6985398 Memory device having multiple array structure for increased bandwidth
01/10/2006US6985397 Semiconductor storage device and portable electronic equipment having the same
01/10/2006US6985396 Semiconductor integrated circuit
01/10/2006US6985395 Semiconductor memory device and method of testing the device
01/10/2006US6985394 Integrated circuit devices including input/output line pairs and precharge circuits and related memory devices
01/10/2006US6985392 Byte aligned redundancy for memory array
01/10/2006US6985391 High speed redundant data sensing method and apparatus
01/10/2006US6985390 Integrated memory circuit having a redundancy circuit and a method for replacing a memory area
01/10/2006US6985389 Phase change based memory device and method for operating same
01/10/2006US6985388 Dynamic column block selection
01/10/2006US6985387 System and method for one-time programmed memory through direct-tunneling oxide breakdown
01/10/2006US6985383 Reference generator for multilevel nonlinear resistivity memory storage elements
01/10/2006US6985375 Adjusting the frequency of an oscillator for use in a resistive sense amp
01/10/2006US6985374 Ferroelectric memory device
01/10/2006US6985372 Analog content addressable memory (CAM) employing analog nonvolatile storage
01/10/2006US6985009 Signal transmitting system
01/10/2006US6984867 Magnetic memory device
01/10/2006US6984012 Cartridge and recording apparatus
01/05/2006WO2006002278A2 Apparatus and method for improving dynamic refresh in a semiconductor memory device with reduced stanby power
01/05/2006WO2006001910A2 Memory device with a data hold latch
01/05/2006WO2006001058A1 Semiconductor device and source voltage control method
01/05/2006WO2006000959A2 Playback device for optical storage discs
01/05/2006US20060005232 Path utilization device discovery
01/05/2006US20060005107 Error correction in ROM embedded DRAM
01/05/2006US20060002223 SRAM employing virtual rail scheme stable against various process-voltage-temperature variations
01/05/2006US20060002222 Input/output circuit
01/05/2006US20060002221 Refresh counter circuit and control method for refresh operation
01/05/2006US20060002220 Assessing energy requirements for a refreshed device
01/05/2006US20060002219 Power offloading for a subscriber line interface circuit
01/05/2006US20060002217 Refreshing dynamic volatile memory
01/05/2006US20060002216 Thin film magnetic memory device and semiconductor integrated circuit device including the same as one of circuit blocks
01/05/2006US20060002215 Information processing apparatus and information display method
01/05/2006US20060002214 Semiconductor storage device having page copying function
01/05/2006US20060002213 Semiconductor storage device having page copying function
01/05/2006US20060002212 Semiconductor device
01/05/2006US20060002211 Two transistor gain cell, method, and system
01/05/2006US20060002210 Ethernet controller with excess on-board flash for microcontroller interface
01/05/2006US20060002201 Active termination control
01/05/2006US20060002200 Voltage control circuit and semiconductor device
01/05/2006US20060002199 Nonvolatile memory apparatus
01/05/2006US20060002198 Data storage apparatus, data providing system and data providing method
01/05/2006US20060002196 Memory system and test method therefor
01/05/2006US20060001475 Class-AB beta helper to reduce effects of mirror perturbation
01/05/2006DE20321101U1 Memory device e.g. dynamic RAM, for memory system of computer, has data buses to transfer read and write data between interface and data storage arrays during overlap time period of data transfer on the buses
01/05/2006DE102005015828A1 Hub for memory module e.g. fully buffered dual-in-line memory module, has controller which ignores memory identification information in response to southbound packet from memory controller when writing packet data during test mode
01/05/2006DE102005001935A1 Lese-Schreib-Verarbeitungsvorrichtung für RFID-Tag Read-write device for processing RFID tag
01/05/2006DE102004025917B3 Integrated circuit esp. for semiconductor memory, has control terminal of first controlled resistance of one amplifier circuit driven with first control signal
01/05/2006DE10109486B4 Integrierter DRAM-Speicherbaustein Integrated DRAM memory module
01/04/2006EP1612801A1 Power-saving reading of magnetic memory devices
01/04/2006EP1612799A2 Protection for input buffers of flash memories
01/04/2006CN1717747A SRAM memory cell and method for compensating a leakage current for it
01/04/2006CN1717741A Sense amplifier for a memory having at least two distinct resistance states
01/04/2006CN1717662A Memory module, memory system, and information device
01/04/2006CN1716610A Double gate finfet field effect transistor gain unit and its producing method
01/04/2006CN1716599A Three-dimensional semiconductor device provided with interchip interconnection selection means
01/04/2006CN1716454A Flash memory device including bit line voltage clamp circuit for controlling bit line voltage during programming, and bit line voltage control method thereof
01/04/2006CN1716453A Multi-port memory device for buffering between hosts and non-volatile memory devices
01/04/2006CN1716448A High speed low power consumption current sensitive amplifier
01/04/2006CN1716447A Semiconductor memory device for low power consumption
01/04/2006CN1716446A Input/output circuit
01/04/2006CN1716445A Semiconductor memory device and semiconductor integrated circuit
01/04/2006CN1716444A Semiconductor memory device capable of stably setting mode register set and method therefor
01/04/2006CN1716442A Memory device
01/04/2006CN1716214A Decision feedback equalization input buffer
01/04/2006CN1716147A Hierarchical module
01/04/2006CN1235227C Portable readable and writable memory with USB interface and its data management method
01/04/2006CN1235158C Dynamic latch receiver with automatic reset pointer
01/04/2006CN1235152C Semiconductor device and driving method of semiconductor device
01/03/2006US6983428 Highly compact non-volatile memory and method thereof
01/03/2006US6983281 Terminal apparatus
01/03/2006US6983023 Data transmission system of directional coupling type using forward wave and reflection wave
01/03/2006US6983010 High frequency equalizer using a demultiplexing technique and related semiconductor device
01/03/2006US6982924 Data output control circuit
01/03/2006US6982923 Semiconductor memory device adaptive for use circumstance
01/03/2006US6982922 Single-clock, strobeless signaling system
01/03/2006US6982920 Flash array implementation with local and global bit lines
01/03/2006US6982919 Memory card and data processing system
01/03/2006US6982917 DRAM partial refresh circuits and methods
01/03/2006US6982916 Method and system for providing temperature dependent programming for magnetic memories
01/03/2006US6982915 SRAM with temperature-dependent voltage control in sleep mode
01/03/2006US6982914 Semiconductor memory device
01/03/2006US6982913 Data read circuit for use in a semiconductor memory and a memory thereof
01/03/2006US6982912 Semiconductor memory device
01/03/2006US6982910 Reverse voltage generation circuit
01/03/2006US6982909 System and method for reading a memory cell
01/03/2006US6982908 Magnetic random access memory device capable of providing a constant current to a reference cell
01/03/2006US6982904 Non-volatile semiconductor memory device and electric device with the same
01/03/2006US6982903 Field effect devices having a source controlled via a nanotube switching element
01/03/2006US6982896 Nonvolatile ferroelectric memory device having a multi-bit control function
01/03/2006US6982895 Method for reading a passive matrix-addressable device and a device for performing the method
01/03/2006US6982445 MRAM architecture with a bit line located underneath the magnetic tunneling junction device
12/2005
12/29/2005WO2005124786A1 Semiconductor memory
12/29/2005WO2005122711A2 Solid-state storage device with wireless host interface
12/29/2005WO2004109751A3 Fault tolerant data storage circuit
12/29/2005US20050289444 Low power cost-effective ECC memory system and method
12/29/2005US20050289442 Error correction in ROM embedded DRAM
12/29/2005US20050289424 Error correction in ROM embedded DRAM