| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 09/27/2007 | WO2007107182A1 Adjusting a digital delay function of a data memory unit |
| 09/27/2007 | WO2007107073A1 Smart card storage system and file management method therein |
| 09/27/2007 | WO2007076414A3 Reference sense amplifier and method for compensated sensing in non-volatile memory |
| 09/27/2007 | WO2006019466A3 Memory with fault tolerant reference circuitry |
| 09/27/2007 | US20070223299 Memory with a temperature sensor, dynamic memory and memory with a clock unit and method of sensing a temperature of a memory |
| 09/27/2007 | US20070223298 Differential and Hierarchical Sensing for Memory Circuits |
| 09/27/2007 | US20070223297 Semiconductor storage device |
| 09/27/2007 | US20070223296 Bitline isolation control to reduce leakage current in memory device |
| 09/27/2007 | US20070223295 Flash memory device having a function for reducing data input error and method of inputting the data in the same |
| 09/27/2007 | US20070223294 Fast access memory architecture |
| 09/27/2007 | US20070223293 Parallel read for front end compression mode |
| 09/27/2007 | US20070223290 Low power multi-chip semiconductor memory device and chip enable method thereof |
| 09/27/2007 | US20070223289 High voltage switch circuit having boosting circuit and flash memory device including the same |
| 09/27/2007 | US20070223288 Circuit and method for adjusting threshold drift over temperature in a CMOS receiver |
| 09/27/2007 | US20070223287 Pipe latch circuit for increasing data output speed, a semiconductor memory device with the pipe latch circuit and data output operation method of the same |
| 09/27/2007 | US20070223281 Flash memory device and read operation method thereof |
| 09/27/2007 | US20070223280 Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells |
| 09/27/2007 | US20070223274 Complex Memory Chip |
| 09/27/2007 | US20070223272 Semiconductor memory device |
| 09/27/2007 | US20070223266 One-time-programmable (OTP) memory device and method for testing the same |
| 09/27/2007 | DE10336709B4 Kassette und Aufzeichnungsvorrichtung Cartridge and recording apparatus |
| 09/26/2007 | EP1837876A2 Universal player for compressed audio |
| 09/26/2007 | CN200953593Y Watch type multi-media device |
| 09/26/2007 | CN200953248Y Fingerprint ciphering virus-killing U disc |
| 09/26/2007 | CN101043811A Portable player having voice communication and information transmission function |
| 09/26/2007 | CN101043289A Method and apparatus for solving read-write collision of memory |
| 09/26/2007 | CN101042927A Semiconductor memory device |
| 09/26/2007 | CN101042926A Memory control method, memory device and memory controller |
| 09/26/2007 | CN101042925A Memory controller, memory device and method for calibrating adjustment signal |
| 09/26/2007 | CN101042924A Method and apparatus for determining the time of flash memory element sensing |
| 09/26/2007 | CN101042923A Read out amplifier |
| 09/26/2007 | CN100339909C Integated circuit storing equipment |
| 09/25/2007 | US7275189 Memory module and method for operating a memory module in a data memory system |
| 09/25/2007 | US7275173 Method for measuring and compensating for skews of data transmission lines by compensating for skew by delay elements switched in response to the calculated reative skew |
| 09/25/2007 | US7275172 Apparatus and method for generating a delayed clock signal |
| 09/25/2007 | US7275128 Selectable block protection for non-volatile memory |
| 09/25/2007 | US7274618 Word line driver for DRAM embedded in a logic process |
| 09/25/2007 | US7274616 Integrated circuit apparatus |
| 09/25/2007 | US7274613 Dynamic random access memory (DRAM) capable of canceling out complementary noise development in plate electrodes of memory cell capacitors |
| 09/25/2007 | US7274612 DRAM circuit and its operation method |
| 09/25/2007 | US7274611 Method and architecture to calibrate read operations in synchronous flash memory |
| 09/25/2007 | US7274610 Semiconductor memory device |
| 09/25/2007 | US7274609 High speed redundant data sensing method and apparatus |
| 09/25/2007 | US7274608 Semiconductor memory device and a method of redressing a memory cell |
| 09/25/2007 | US7274607 Bitline exclusion in verification operation |
| 09/25/2007 | US7274606 Low power chip select (CS) latency option |
| 09/25/2007 | US7274605 Per-bit set-up and hold time adjustment for double-data rate synchronous DRAM |
| 09/25/2007 | US7274604 Memory device having terminals for transferring multiple types of data |
| 09/25/2007 | US7274603 Level shifter circuit and semiconductor memory device using same |
| 09/25/2007 | US7274602 Storage device and control method therefor |
| 09/25/2007 | US7274582 High speed data bus |
| 09/25/2007 | US7274352 Combining detection circuit for a display panel |
| 09/25/2007 | US7274261 Semiconductor integrated circuit |
| 09/25/2007 | US7274220 Method and apparatus for amplifying a regulated differential signal to a higher voltage |
| 09/25/2007 | US7274219 Offset independent sense circuit and method |
| 09/20/2007 | WO2007106481A1 Memory device distributed controller system |
| 09/20/2007 | WO2007105156A1 Double data rate interface |
| 09/20/2007 | US20070220295 Method and apparatus for providing symmetrical output data for a double data rate dram |
| 09/20/2007 | US20070217276 Fuse latch circuit, semiconductor device and semiconductor memory system |
| 09/20/2007 | US20070217275 Semiconductor device for driving a current load device and a current load device provided therewith |
| 09/20/2007 | US20070217270 Synchronous semiconductor memory device having on-die termination circuit and on-die termination method |
| 09/20/2007 | US20070217269 Semiconductor memory device and driving method of semiconductor memory device |
| 09/20/2007 | US20070217268 Semiconductor Memory Chip |
| 09/20/2007 | US20070217247 Shared sense amplifier for fuse cell |
| 09/20/2007 | DE19758791B4 FRAM semiconductor memory for computer - has memory cells contg. transistor, ferro-electric capacitor between source and drain, series-connected storage cells and selection transistor |
| 09/20/2007 | DE102006057946A1 Taktrückgewinnungsschaltung und Speicherbaustein, der diese verwendet The clock recovery circuit and memory module which uses this |
| 09/19/2007 | EP1835508A2 Pram and associated operation method and system |
| 09/19/2007 | EP1835507A1 Level shifter for semiconductor memory device implemented with low-voltage transistors |
| 09/19/2007 | EP1835506A1 Semiconductor memory, memory system, and operation method of memory system |
| 09/19/2007 | EP1834336A1 Method for operating a passive matrix-addressable ferroelectric or electret memory device |
| 09/19/2007 | EP1668671A4 Apparatus and method for selectively configuring a memory device using a bi-stable relay |
| 09/19/2007 | EP1245029A4 Spin dependent tunneling memory |
| 09/19/2007 | CN200950356Y MP3 format audio player suitable for children use |
| 09/19/2007 | CN101040344A Self-adaptive program delay circuitry for programmable memories |
| 09/19/2007 | CN101040274A Command controlling different operations in different chips |
| 09/19/2007 | CN101038785A A high speed dram architecture with uniform access latency |
| 09/19/2007 | CN101038782A Reduction of the time for executing an externally commanded transfer of data in an integrated device |
| 09/19/2007 | CN101038781A 1394 interface memory card |
| 09/19/2007 | CN101038529A Prolonging service life of internal or external memory with long service non-volatile memory chip |
| 09/19/2007 | CN100338774C 半导体存储器 Semiconductor memory |
| 09/19/2007 | CN100338684C Semiconductor device for use in two systems with different power voltages |
| 09/19/2007 | CN100338683C MRAM bit line word line architecture |
| 09/19/2007 | CN100338557C Phase controlled high speed interfaces |
| 09/19/2007 | CN100338546C Hierarchical module |
| 09/18/2007 | US7272070 Memory access using multiple activated memory cell rows |
| 09/18/2007 | US7272066 Method and system for controlling refresh to avoid memory cell data losses |
| 09/18/2007 | US7272065 Compensated refresh oscillator |
| 09/18/2007 | US7272064 Thin film magnetic memory device for writing data of a plurality of bits in parallel |
| 09/18/2007 | US7272063 Memory with a temperature sensor, dynamic memory and memory with a clock unit and method of sensing a temperature of a memory |
| 09/18/2007 | US7272062 Current sense amplifier for low voltage applications with direct sensing on the bitline of a memory matrix |
| 09/18/2007 | US7272061 Dynamic pre-charge level control in semiconductor devices |
| 09/18/2007 | US7272060 Method, system, and circuit for performing a memory related operation |
| 09/18/2007 | US7272059 Sensing circuit for a semiconductor memory |
| 09/18/2007 | US7272058 Nonvolatile semiconductor memory device having redundant relief technique |
| 09/18/2007 | US7272056 Data output controller in semiconductor memory device and control method thereof |
| 09/18/2007 | US7272055 Method and apparatus for timing adjustment |
| 09/18/2007 | US7272054 Time domain bridging circuitry for use in determining output enable timing |
| 09/18/2007 | US7272047 Wordline voltage generating circuit including a voltage dividing circuit for reducing effects of parasitic capacitance |
| 09/18/2007 | US7272042 Semiconductor integrated circuit device |
| 09/18/2007 | US7272033 Magnetic film structure using spin charge, a method of manufacturing the same, a semiconductor device having the same, and a method of operating the semiconductor device |