Patents
Patents for G11C 16 - Erasable programmable read-only memories (44,373)
07/2008
07/01/2008US7394699 Sense amplifier for a non-volatile memory device
07/01/2008US7394698 Method and apparatus for adjusting a read reference level under dynamic power conditions
07/01/2008US7394697 Nonvolatile semiconductor memory device which stores multi-value information
07/01/2008US7394695 Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
07/01/2008US7394692 Non-volatile semiconductor memory with large erase blocks storing cycle counts
07/01/2008US7394690 Method for column redundancy using data latches in solid-state memories
07/01/2008US7394688 Nonvolatile memory
07/01/2008US7394090 Non-volatile memory and the fabrication method
07/01/2008US7393747 Nonvolatile semiconductor memory and a fabrication method thereof
06/2008
06/26/2008WO2008077125A1 Erasing flash memory using adaptive drain and/or gate bias
06/26/2008WO2008076988A1 High speed fanned out system architecture and input/output circuits for non-volatile memory
06/26/2008WO2008076978A1 Dual-bit memory device having trench isolation material disposed near bit line contact areas
06/26/2008WO2008076656A1 Erase method for a memory including soft programming
06/26/2008WO2008076553A2 Column redundancy for a flash memory with a high write parallelism
06/26/2008WO2008075351A2 Soft decoding of hard and soft bits read from a flash memory
06/26/2008WO2008074212A1 Method for controlling flash memory
06/26/2008WO2008074126A1 Id generation apparatus and method for serially interconnected devices
06/26/2008US20080155380 Increasing the Effectiveness of Error Correction Codes and Operating Multi-Level Memory Systems by Using Information About the Quality of the Stored Data
06/26/2008US20080155184 Methods and apparatus for writing data to non-volatile memory
06/26/2008US20080151645 Operating method of non-volatile memory
06/26/2008US20080151644 Cycling improvement using higher erase bias
06/26/2008US20080151643 Method and apparatus to create an erase disturb on a non-volatile static random access memory cell
06/26/2008US20080151642 Double-Side-Bias Methods of Programming and Erasing a Virtual Ground Array Memory
06/26/2008US20080151641 Non-volatile memory device reducing data programming and verification time, and method of driving the same
06/26/2008US20080151640 Semiconductor integrated circuit device
06/26/2008US20080151639 Flash memory device with external high voltage supply
06/26/2008US20080151638 Selective threshold voltage verification and compaction
06/26/2008US20080151637 Interleaved memory program and verify method, device and system
06/26/2008US20080151636 Repetitive erase verify technique for flash memory devices
06/26/2008US20080151635 Semiconductor memory devices and a method thereof
06/26/2008US20080151634 Negative wordline bias for reduction of leakage current during flash memory operation
06/26/2008US20080151633 Method of Programming in a Non-Volatile Memory Device and Non-Volatile Memory Device for Performing the Same
06/26/2008US20080151632 Flash memory device having multi-level cell and reading and programming method thereof
06/26/2008US20080151631 Non-volatile memory device and method of operating the same
06/26/2008US20080151630 System for reducing wordline recovery time
06/26/2008US20080151628 System for low voltage programming of non-volatile memory cells
06/26/2008US20080151627 Method of low voltage programming of non-volatile memory cells
06/26/2008US20080151625 Non-volatile semiconductor memory device allowing efficient programming operation and erasing operation in short period of time
06/26/2008US20080151623 Non-Volatile Memory In CMOS Logic Process
06/26/2008US20080151622 Command-based control of NAND flash memory
06/26/2008US20080151620 Scheme of semiconductor memory and method for operating same
06/26/2008US20080151617 Soft decoding of hard and soft bits read from a flash memory
06/26/2008DE10338273B4 Halbleiterspeicherbauelement und Zugriffsverfahren hierfür The semiconductor memory device and access method thereof
06/26/2008DE10227255B4 Verfahren zur Wiederherstellung von Verwaltungsdatensätzen eines blockweise löschbaren Speichers Process for the recovery of administrative records of a block-erasable memory
06/26/2008DE102007009877B3 Memory array, particularly memory array with resistive memory elements, has multiple memory devices, multiple bit lines, multiple word lines and multiple additional lines
06/26/2008DE10162860B4 Nichtflüchtiger Halbleiterspeicher sowie zugehöriges Programmierverfahren A non-volatile semiconductor memory and associated programming method
06/26/2008CA2671184A1 Id generation apparatus and method for serially interconnected devices
06/25/2008EP1936681A1 Non-volatile memory device and method of operating the same
06/25/2008EP1936672A1 Electron blocking layers for gate stacks of nonvolatile memory devices
06/25/2008EP1936632A1 Method and apparatus for detecting static data area, wear-leveling, and merging data units in nonvolatile data storage device
06/25/2008EP1934985A2 Method and apparatus for programming/erasing a non-volatile memory
06/25/2008EP1934741A2 Methods and apparatus for programming secure data into programmable and irreversible cells
06/25/2008CN201078791Y Flash memory burning program apparatus
06/25/2008CN201078790Y Burning program tool of quick flashing memory body
06/25/2008CN101208754A Semiconductor device and method for controlling the same
06/25/2008CN101208753A Method of achieving wear leveling in flash memory using relative grades
06/25/2008CN101208752A Nonvolatile memory cell comprising a diode and a resistance-switching material
06/25/2008CN101207178A Phase-change storage element and manufacturing method thereof
06/25/2008CN101207157A Method for improving fixed hydrocarbon memory data erasing velocity
06/25/2008CN101207153A Nonvolatile memory device and method of operating the same
06/25/2008CN101207136A Non-volatile memory device and method of operating the same
06/25/2008CN101207133A Multi-bit programmable non-volatile storage unit and design method thereof
06/25/2008CN101207132A Flash memory unit and operating method thereof
06/25/2008CN101206923A Method of programming multi-level cells and non-volatile memory device including the same
06/25/2008CN101206922A Method of programming in a non-volatile memory device and non-volatile memory device for performing the same
06/25/2008CN101206921A Method for reducing storage unit write-in disorder
06/25/2008CN101206920A Method for reducing storage unit write-in disorder
06/25/2008CN101206907A Circuit and method for inhibition of voltage dithering
06/25/2008CN101205312A Organic memory device using iridium organ metallic compound and fabrication method thereof
06/25/2008CN100397417C Memory card
06/25/2008CN100397363C Data management appartus and method used for flash memory
06/25/2008CN100397339C Integrated in-circuit programming device and method
06/25/2008CN100397330C Semiconductor device
06/24/2008US7392444 Non-volatile memory evaluating method and non-volatile memory
06/24/2008US7391663 Structure and method for measuring the channel boosting voltage of NAND flash memory at a node between drain/source select transistor and adjacent flash memory cell
06/24/2008US7391655 Data processing system and nonvolatile memory
06/24/2008US7391654 Memory block erasing in a flash memory device
06/24/2008US7391653 Twin insulator charge storage device operation and its fabrication method
06/24/2008US7391652 Method of programming and erasing a p-channel BE-SONOS NAND flash memory
06/24/2008US7391651 Method for programming NAND flash memory device and page buffer performing the same
06/24/2008US7391650 Method for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates
06/24/2008US7391648 Low voltage sense amplifier for operation under a reduced bit line bias voltage
06/24/2008US7391647 Non-volatile memory in CMOS logic process and method of operation thereof
06/24/2008US7391646 Non-volatile memory and method with control gate compensation for source line bias errors
06/24/2008US7391645 Non-volatile memory and method with compensation for source line bias errors
06/24/2008US7391638 Memory device for protecting memory cells during programming
06/24/2008US7391253 Power saving semiconductor integrated circuit device
06/24/2008US7391072 Programmable array logic or memory with p-channel devices and asymmetrical tunnel barriers
06/19/2008WO2008073421A2 Hybrid non-volatile solid state memory system
06/19/2008WO2008055184A3 Programming pulse generator for nonvolatile nand-memory
06/19/2008WO2008055183A3 Adaptive gate voltage regulation
06/19/2008WO2008042598A3 Involatile memory with soft-input,soft-output (siso) decoder, statistical unit and adaptive operation
06/19/2008WO2008039692A3 Memory with cell population distribution assisted read margining
06/19/2008WO2008030351A3 Memory erase using discharching of charge storage device
06/19/2008WO2008027966A3 Detecting radiation-based attacks
06/19/2008WO2008026204A3 Logical super block mapping for nand flash memory
06/19/2008WO2008023368A3 A nand flash memory controller exporting a logical sector-based interface
06/19/2008US20080144396 Erasing flash memory using adaptive drain and/or gate bias
06/19/2008US20080144395 Operating method of non-volatile memory
06/19/2008US20080144393 Bit line pre-settlement circuit and method for flash memory sensing scheme