Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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04/08/1999 | DE19751540C1 Integrated semiconductor circuit with independent supply networks for DRAM |
04/07/1999 | EP0907251A2 Synchronous delay circuit |
04/07/1999 | EP0907185A2 Floating bitline test mode with digitally controllable bitline equalizers |
04/07/1999 | EP0907183A2 Semiconductor integrated circuit device |
04/07/1999 | EP0906623A1 Multi-level memory circuit with regulated writing voltage |
04/07/1999 | EP0906622A1 Multi-level memory circuit with regulated reading voltage |
04/07/1999 | CN1213181A Semiconductor device |
04/07/1999 | CN1213142A Semiconductor memory with built-in row buffer and method of driving the same |
04/07/1999 | CN1213141A Semiconductor memory with high space-efficient MDQ switch placement |
04/07/1999 | CN1213139A Apparatus and method for high-speed wordline driving with low area overheat |
04/06/1999 | USRE36180 Simultaneous read and refresh of different rows in a DRAM |
04/06/1999 | US5893167 Data transfer control of a video memory having a multi-divisional random access memory and a multi-divisional serial access |
04/06/1999 | US5893158 Multibank dram system controlled by multiple dram controllers with an active bank detector |
04/06/1999 | US5892981 Memory system and device |
04/06/1999 | US5892730 Synchronous semiconductor memory device operable in a plurality of data write operation modes |
04/06/1999 | US5892729 Power savings for memory arrays |
04/06/1999 | US5892728 Column decoder configuration for a 1T/1C ferroelectric memory |
04/06/1999 | US5892727 Word line driver in a multi-value mask ROM |
04/06/1999 | US5892726 Address decoder |
04/06/1999 | US5892724 NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines |
04/06/1999 | US5892722 Column selection circuit |
04/06/1999 | US5892714 Method of programming and/or verifying a threshold voltage level of a nonvolatile memory cell |
04/06/1999 | US5892710 Method and circuitry for storing discrete amounts of charge in a single memory element |
04/06/1999 | US5892708 Magnetoresistive memory using large fraction of memory cell films for data storage |
04/06/1999 | US5892706 Fram, fram card, and card system using the same |
04/06/1999 | US5892705 Apparatus for maintaining non-volatility in ferroelectric ramdom access memory and method therefor |
04/06/1999 | US5892392 Device for setting a bias source at stand-by |
04/06/1999 | US5892390 Internal power supply circuit with low power consumption |
04/06/1999 | US5892386 Internal power control circuit for a semiconductor device |
04/06/1999 | US5892384 Timing signal generation circuit |
04/01/1999 | WO1998058383A3 Electrically addressable passive device, method for electrical addressing of the same and uses of the device and the method |
04/01/1999 | DE19841753A1 Semiconductor static random access memory |
03/31/1999 | EP0905904A2 Semiconductor integrated circuit having tri-state logic gate circuit |
03/31/1999 | EP0905785A2 High density semiconductor memory |
03/31/1999 | EP0905705A2 Space-efficient semiconductor memory having hierarchical column select line architecture |
03/31/1999 | EP0905703A2 Semiconductor memory having space-efficient layout |
03/31/1999 | EP0905702A2 Secondery sense amplifier with window discriminator for self-timed operation |
03/31/1999 | EP0905701A2 Semiconductor memory having hierarchical bit line architecture with non-uniform local bit lines |
03/31/1999 | EP0905625A2 Semiconductor memory circuit having shift redundancy circuits |
03/31/1999 | EP0905597A1 A method and apparatus for reducing the bias current in a reference voltage circuit |
03/31/1999 | EP0904589A1 Floating gate memory device with low current page buffer |
03/31/1999 | EP0904588A1 A device and method for multi-level charge/storage and reading out |
03/31/1999 | EP0904587A1 Page mode floating gate memory device storing multiple bits per cell |
03/31/1999 | CN1212464A Semiconductor integrated circuit with DRAM |
03/31/1999 | CN1212437A Floating bitline test mode with digitally controllable bitline equalizers |
03/31/1999 | CN1212435A Semiconductor integrated circuit having tri-state logie gate circuit |
03/31/1999 | CN1212434A Ferroelectric random access memory device with reference cell array blocks |
03/31/1999 | CN1212432A Dimension programmable fusebanks and methods for making the same |
03/31/1999 | CN1212431A Semiconductor integrated circuit device |
03/31/1999 | CN1212430A Semiconductor integrated circuit device |
03/31/1999 | CN1212429A Semiconductor integrated circuit device |
03/30/1999 | USRE36169 Semiconductor memory device |
03/30/1999 | US5890215 Electronic computer memory system having multiple width, high speed communication buffer |
03/30/1999 | US5890199 Data processor incorporating a ferroelectric memory array selectably configurable as read/write and read only memory |
03/30/1999 | US5890198 Intelligent refresh controller for dynamic memory devices |
03/30/1999 | US5890197 Semiconductor memory device having split transfer function |
03/30/1999 | US5890186 Memory circuit with built-in cache memory |
03/30/1999 | US5889728 Write control method for memory devices |
03/30/1999 | US5889725 Decoder circuit for a semiconductor memory device |
03/30/1999 | US5889724 Word line driving circuit for semiconductor memory device and method |
03/30/1999 | US5889718 Dynamic type semiconductor memory device |
03/30/1999 | US5889717 Dynamic random access memory |
03/30/1999 | US5889716 Semiconductor memory |
03/30/1999 | US5889715 Voltage sense amplifier and methods for implementing the same |
03/30/1999 | US5889712 Semiconductor memory device |
03/30/1999 | US5889709 Data latch circuit device with flip-flop of semi-conductor memory of synchronous DRAM |
03/30/1999 | US5889708 Data reading circuit for semiconductor memory device |
03/30/1999 | US5889707 Output buffer of semiconductor memory device |
03/30/1999 | US5889699 Non-volatile semiconductor memory device |
03/30/1999 | US5889698 Nonvolatile memory device and refreshing method |
03/30/1999 | US5889697 Memory cell for storing at least three logic states |
03/30/1999 | US5889696 Thin-film capacitor device and RAM device using ferroelectric film |
03/30/1999 | US5889695 Nonvolatile semiconductor memory device reduced in occupy area of memory cell |
03/30/1999 | US5889664 Multiple level voltage generator for semiconductor memory device |
03/25/1999 | WO1999014763A1 A read-only memory and read-only memory devices |
03/25/1999 | WO1999014762A1 A read-only memory and read-only memory device |
03/25/1999 | WO1999014761A1 Ferroelectric memory cell with shunted ferroelectric capacitor and method of making same |
03/25/1999 | WO1999014760A1 Memory location arrangement and its use as a magnetic ram and as an associative memory |
03/25/1999 | WO1999014758A1 Sense amplifier for flash memories |
03/25/1999 | DE19818045A1 Test circuit for integrated circuit on same chip |
03/24/1999 | EP0903755A2 Ciruit and method to externally adjust internal circuit timing |
03/24/1999 | EP0903747A2 Apparatus and method for high-speed wordline driving with low area overhead |
03/24/1999 | EP0903746A1 Device and procedure for reading/rewriting a dynamic memory cell |
03/24/1999 | EP0902924A1 Redundancy concept for memory circuits with rom storage cells |
03/24/1999 | CN1211827A Ferroelectric memory transistor with resistively couple floating gate |
03/24/1999 | CN1211800A Semiconductor integrated circuit device |
03/24/1999 | CN1211799A Semiconductor integrated circuit device |
03/24/1999 | CN1211798A Semiconductor integrated circuit device |
03/24/1999 | CN1211797A Semiconductor memory device with reduced power consumption and stable operation in data holding state |
03/24/1999 | CN1211796A Semiconductor memory |
03/24/1999 | CN1211795A Circuit device for data content evaluation of memory cell |
03/23/1999 | USRE36159 Semiconductor integrated circuit device having built-in voltage drop circuit |
03/23/1999 | US5887272 Enhanced DRAM with embedded registers |
03/23/1999 | US5887162 Memory device having circuitry for initializing and reprogramming a control operation feature |
03/23/1999 | US5886949 Method and circuit for generating a synchronizing ATD signal |
03/23/1999 | US5886947 Semiconductor memory device with shared data input/output line |
03/23/1999 | US5886946 Semiconductor memory device allowing reduction in power consumption during standby |
03/23/1999 | US5886944 Memory device having page copy mode |
03/23/1999 | US5886943 Semiconductor memory having a hierarchical data line structure |
03/23/1999 | US5886942 Word line driver and semiconductor device |