Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/1998
12/22/1998US5852552 High voltage generator with a latch-up prevention function
12/22/1998US5852371 Voltage level translator
12/22/1998US5852364 System and method for testing integrated circuits connected together
12/22/1998US5851881 Method of making monos flash memory for multi-level logic
12/22/1998CA2109835C Differential latching inverter and random access memory using same
12/17/1998WO1998057332A1 Semiconductor circuit and method of controlling the same
12/17/1998WO1998057331A1 Two step memory device command buffer apparatus and method and memory devices and computer systems using same
12/17/1998WO1998057330A1 Method and system for storing and processing multiple memory addresses
12/17/1998DE19825986A1 Clock circuit with synchronisation between internal and external clock signals
12/17/1998DE19823485A1 Device for fixing address signal changes in solid state memory
12/16/1998EP0884732A2 Timing signal generating circuit, semiconductor integrated circuit device and semiconductor integrated circuit system to which the timing signal generating circuit is applied, and signal transmission system
12/16/1998CN1202262A Multiple writes per a single erase for nonvolatile memory
12/16/1998CN1201985A High read speed multivalued read only memory device
12/16/1998CN1201927A Clock generating circuit
12/16/1998CN1041250C 半导体存储装置 The semiconductor memory device
12/15/1998US5850483 Image decompressing apparatus with efficient image data transfer
12/15/1998US5850367 Static type semiconductor memory with latch circuit amplifying read data read on a sub bit line pair and transferring the amplified read data to a main bit line pair and operation method thereof
12/15/1998US5850364 Static semiconductor memory device with precharging circuits having similar configuration of memory cells
12/15/1998US5850363 Voltage boosting circuit having dual precharge circuits in semiconductor memory device
12/15/1998US5850362 Semiconductor memory device employing an improved layout of sense amplifiers
12/15/1998US5850359 Asynchronous high speed zero DC-current SRAM system
12/15/1998US5850231 Electronic device having ferroelectric memory
12/15/1998US5850092 Integrated circuit
12/10/1998WO1998056004A1 Semiconductor memory device
12/10/1998WO1998056003A1 Ferroelectric memory device and method for driving it
12/10/1998WO1998056002A1 Novel flash memory array and decoding architecture
12/10/1998WO1998055897A2 Optical logic element and methods for respectively its preparation and optical addressing, as well as the use thereof in an optical logic device
12/09/1998EP0883132A2 Reconfigurable dual mode memory in programmable logic devices
12/09/1998EP0883131A2 Semiconductor storage device such as cache memory
12/09/1998EP0882289A1 Lateral magneto-electronic device exploiting a quasi-two-dimensional electron gas
12/09/1998EP0568015B1 Dynamic random access memory device with intermediate voltage generator interrupting power supply in test operation
12/09/1998CN1201239A Semiconductor storage device capable of storing multibit data in one storage unit
12/09/1998CN1201238A Storage integrated circuit and main storage system and figure storage system thereof using same
12/09/1998CN1041136C Wright signal input buffer in semiconductor integrated circuit
12/08/1998US5848431 Synchronous SRAMs having multiple chip select inputs and a standby chip enable input
12/08/1998US5848025 Method and apparatus for controlling a memory device in a page mode
12/08/1998US5848024 Clock controlled column decoder
12/08/1998US5848023 Semiconductor memory device operable in burst mode and method of controlling the same
12/08/1998US5848021 Semiconductor memory device having main word decoder skipping defective address during sequential access and method of controlling thereof
12/08/1998US5848020 Semiconductor memory and method of using the same, column decoder, and image processor
12/08/1998US5848017 Method and apparatus for stress testing a semiconductor memory
12/08/1998US5848016 Merged Memory and Logic (MML) integrated circuits and methods including serial data path comparing
12/08/1998US5848014 Semiconductor device such as a static random access memory (SRAM) having a low power mode using a clock disable circuit
12/08/1998US5848012 Semiconductor memory device having hierarchical bit line structure employing improved bit line precharging system
12/08/1998US5848011 Semiconductor memory device
12/08/1998US5848008 Floating bitline test mode with digitally controllable bitline equalizers
12/08/1998US5848007 Redundancy circuit for semiconductor storage apparatus
12/08/1998US5848004 Semiconductor memory device
12/08/1998US5848003 Semiconductor memory
12/08/1998US5848002 Information storage apparatus and method for operating the same
12/08/1998US5848001 Semidirect sensing circuit having combined read and write data bus
12/08/1998US5848000 Flash memory address decoder with novel latch structure
12/08/1998US5847996 Eeprom with split gate source side injection
12/08/1998US5847992 Multi-level non-volatile semiconductor memory device having improved multi-level data storing circuits
12/08/1998US5847991 System for recording voice as analog values programmed into single bit cells EEPROMs or flash EEPROM
12/08/1998US5847990 Ram cell capable of storing 3 logic states
12/08/1998US5847989 Ferroelectric memory using non-remnant reference circuit
12/08/1998US5847986 In an integrated circuit
12/08/1998US5847597 Potential detecting circuit for determining whether a detected potential has reached a prescribed level, and a semiconductor integrated circuit including the same
12/08/1998US5847596 Internal voltage generator
12/08/1998US5847595 Semiconductor device having controllable internal potential generating circuit
12/08/1998US5847583 Sense amplifier circuit in which erroneous read operation can be prevented
12/08/1998US5847577 DRAM memory cell for programmable logic devices
12/08/1998US5847565 Logic device
12/08/1998US5847420 Semiconductor integrated circuit having three wiring layers
12/03/1998WO1998054727A2 256 Meg DYNAMIC RANDOM ACCESS MEMORY
12/03/1998DE19807014A1 Semiconducting memory element for computer system
12/03/1998DE19806999A1 Semiconductor memory element e.g. for DRAM
12/03/1998DE19757959A1 Integrated semiconducting circuit for signal processing
12/03/1998DE19756928A1 Over-riding method for bit line reading amplifier
12/02/1998EP0881644A2 Semiconductor memory device with multibank configuration
12/02/1998EP0881571A1 Semiconductor memory device with redundancy
12/02/1998EP0880782A1 Multiple writes per a single erase for a nonvolatile memory
12/02/1998EP0840928A4 An integrated circuit having enable control circuitry
12/02/1998CN1200601A Clamp-like movement delayed circuit with output signal repeat cycle different from input signal
12/02/1998CN1200572A Semiconductor integrated circuit device operating stably at plurality of power supply voltage levels
12/02/1998CN1200546A Semiconductor memory device
12/02/1998CN1200544A Semiconductor device with increased replacement efficiency by redundant memory cell arrays
12/02/1998CN1200543A Data reading circuit for semiconductor memory device
12/01/1998USRE35978 Control circuit of dynamic random access memory
12/01/1998US5845108 Semiconductor memory device using asynchronous signal
12/01/1998US5844915 Method for testing word line leakage in a semiconductor memory device
12/01/1998US5844914 Test circuit and method for refresh and descrambling in an integrated memory circuit
12/01/1998US5844859 Synchronous semiconductor memory device reliably fetching external signal in synchronization with clock signal periodically supplied from the exterior
12/01/1998US5844858 Semiconductor memory device and read and write methods thereof
12/01/1998US5844857 Row address control circuits having a predecoding address sampling pulse generator and methods for memory devices
12/01/1998US5844856 Dual port memories and systems and methods using the same
12/01/1998US5844855 Method and apparatus for writing to memory components
12/01/1998US5844853 Memory regulator control method with flexibility for a wide change in supply voltage
12/01/1998US5844851 For preventing spurious memory readings from a memory device
12/01/1998US5844849 Dynamic semiconductor memory device having fast operation mode and operating with low current consumption
12/01/1998US5844848 Integrated circuit memory devices having improved data masking capability
12/01/1998US5844846 Data output buffer for memory device
12/01/1998US5844845 Data read circuit for use in semiconductor storage apparatus of CMOS memory
12/01/1998US5844844 FPGA memory element programmably triggered on both clock edges
12/01/1998US5844841 Memory system
12/01/1998US5844837 Static memory device including supplemental gate capacitance
12/01/1998US5844836 Memory cell having increased capacitance via a local interconnect to gate capacitor and a method for making such a cell
12/01/1998US5844834 Single-electron memory cell configuration
12/01/1998US5844833 DRAM with open digit lines and array edge reference sensing
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