| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 05/18/1999 | US5905400 Circuit configuration for generating a boosted output voltage |
| 05/18/1999 | US5905392 Auto-refresh control circuit for semiconductor device |
| 05/18/1999 | US5905290 Single event upset hardened memory cell |
| 05/18/1999 | US5905273 Electronic device |
| 05/18/1999 | US5904996 Stacks with exchange biasing layer with nickel oxide and magnetic layer |
| 05/14/1999 | WO1999023661A1 High density ferroelectric memory with increased channel modulation and double word ferroelectric memory cell for constructing the same |
| 05/12/1999 | EP0915476A1 Method and circuit for regulating the length of an ATD pulse signal |
| 05/12/1999 | EP0915475A2 Semiconductor memory |
| 05/12/1999 | EP0914659A1 Combined program and data nonvolatile memory with concurrent program-read/data write capability |
| 05/12/1999 | EP0914658A1 Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping |
| 05/12/1999 | EP0886864A4 Programming flash memory using distributed learning methods |
| 05/12/1999 | DE19850476A1 Integrated circuit with follower synchronization PLL circuit |
| 05/12/1999 | CN1216389A 半导体集成电路 The semiconductor integrated circuit |
| 05/11/1999 | US5903914 Memory access limiter for random access dynamic memories |
| 05/11/1999 | US5903582 Memory circuit |
| 05/11/1999 | US5903575 Semiconductor memory device having fast data writing mode and method of writing testing data in fast data writing mode |
| 05/11/1999 | US5903514 Multi-bank synchronous semiconductor memory device |
| 05/11/1999 | US5903513 Semiconductor integrated circuit device with clock frequency invariant voltage step-down circuit |
| 05/11/1999 | US5903512 In a computer system |
| 05/11/1999 | US5903511 Flexible DRAM array |
| 05/11/1999 | US5903510 Address decoder, semiconductor memory and semiconductor device |
| 05/11/1999 | US5903508 Input buffer of memory device for reducing current consumption in standby mode |
| 05/11/1999 | US5903507 Semiconductor memory device with reduced current consumption in data holding mode |
| 05/11/1999 | US5903506 Temperature sensitive oscillator circuit |
| 05/11/1999 | US5903505 Method of testing memory refresh operations wherein subthreshold leakage current may be set to near worst-case conditions |
| 05/11/1999 | US5903502 Variable equilibrate voltage circuit for paired digit lines |
| 05/11/1999 | US5903495 Semiconductor device and memory system |
| 05/11/1999 | US5903494 Electrically programmable memory cell |
| 05/11/1999 | US5903492 Computer system |
| 05/11/1999 | US5903490 Customizable integrated circuit device |
| 05/11/1999 | US5903488 Semiconductor memory with improved word line structure |
| 05/11/1999 | US5903487 Memory device and method of operation |
| 05/11/1999 | US5903179 Data-outputting buffer circuit |
| 05/11/1999 | US5903169 Charge recycling differential logic (CRDL) circuit and storage elements and devices using the same |
| 05/11/1999 | US5903033 Semiconductor device including resistance element with superior noise immunity |
| 05/11/1999 | US5903022 Semiconductor memory device having improved word line arrangement in a memory cell array |
| 05/11/1999 | US5902690 Passivation layer at least partially surrounding the non-volatile magneto-resistive memory, the passivation layer including ferrite materials for shielding the non-volatile magneto-resistive memory from stray magnetic fields |
| 05/06/1999 | WO1999012170A3 A ferroelectric data processing device |
| 05/06/1999 | EP0913867A2 DRAM cell with separate read and write transistors |
| 05/06/1999 | EP0913834A1 Nonvolatile semiconductor storage device |
| 05/06/1999 | EP0913832A1 Method for multilevel programming of a nonvolatile memory, and a multilevel nonvolatile memory |
| 05/06/1999 | EP0913831A2 Space-efficient master data line (MDQ) switch placement |
| 05/06/1999 | EP0913830A2 Magnetic tunnel junction device with improved ferromagnetic layers |
| 05/06/1999 | EP0674798B1 Memory device |
| 05/06/1999 | DE19837016A1 Integrated semiconductor device with multi-bank memory for e.g. microprocessor |
| 05/05/1999 | CN1216141A Combined program and data nonvolatile memory with concurrent program-read/data write capability |
| 05/05/1999 | CN1215925A Semiconductor memory device and manufacturing method thereof |
| 05/05/1999 | CN1215895A Semiconductor memory circuit |
| 05/05/1999 | CN1215893A Space-efficient semiconductor memory having hierarchical column select line architecture |
| 05/05/1999 | CN1215892A Semiconductive memory device capable of carrying out write-in operation at high speed |
| 05/05/1999 | CN1215865A Circuit and method for retaining data in DRAM in portable electronic device |
| 05/04/1999 | US5901190 Digital delay locked loop circuit using synchronous delay line |
| 05/04/1999 | US5901152 Three-value data storing semiconductor memory system |
| 05/04/1999 | US5901111 Enhanced multiple block writes to adjacent block of memory using a sequential counter |
| 05/04/1999 | US5901109 Semiconductor memory device capable of higher-speed operation and activated in synchronism with clock |
| 05/04/1999 | US5901106 Decoder circuit using redundancy signal having a short pulse format |
| 05/04/1999 | US5901105 Dynamic random access memory having decoding circuitry for partial memory blocks |
| 05/04/1999 | US5901104 Data processing device |
| 05/04/1999 | US5901102 Semiconductor memory device achieving reduction in access time without increase in power consumption |
| 05/04/1999 | US5901101 Semiconductor memory device |
| 05/04/1999 | US5901099 Memory device with a sense amplifier |
| 05/04/1999 | US5901098 Ground noise isolation circuit for semiconductor memory device and method thereof |
| 05/04/1999 | US5901097 Read bus controlling apparatus for semiconductor storage device |
| 05/04/1999 | US5901096 Semiconductor memory device capable of disconnecting an internal booster power supply from a selected word line in response to a test signal and testing method therefor |
| 05/04/1999 | US5901095 Reprogrammable address selector for an embedded DRAM |
| 05/04/1999 | US5901094 Circuit for designating an operating mode of a semiconductor memory device |
| 05/04/1999 | US5901093 Redundancy architecture and method for block write access cycles permitting defective memory line replacement |
| 05/04/1999 | US5901091 Bi-directional data input/output circuit of a synchronous memory device and the method for controlling the same |
| 05/04/1999 | US5901089 Stabilization circuits and techniques for storage and retrieval of single or multiple digital bits per memory cell |
| 05/04/1999 | US5901083 Nonvolatile semiconductor memory device |
| 05/04/1999 | US5901079 Skewed memory cell apparatus and method |
| 05/04/1999 | US5901078 Method of operating a dram having multiple rows of memory cells |
| 05/04/1999 | US5901077 Semiconductor memory device comprising ferroelectric capacitors |
| 05/04/1999 | US5901055 Internal boosted voltage generator of semiconductor memory device |
| 05/04/1999 | US5900764 Efficient Vccp supply with regulation for voltage control |
| 05/04/1999 | US5900665 Semiconductor integrated circuit device operating at high speed with low current consumption |
| 04/29/1999 | WO1999021022A2 Method for detecting a current of spin polarized electrons in a solid body |
| 04/29/1999 | DE19849339A1 Word conductor driver for semiconductor memory |
| 04/29/1999 | DE19829813A1 Integrated logic semiconductor circuit with embedded dynamic random access memory |
| 04/28/1999 | EP0911975A2 Semiconductor integrated circuit |
| 04/28/1999 | EP0911892A2 Magneto-resistance effect device and method of manufacturing the same |
| 04/28/1999 | EP0911871A2 Semiconductor memory device with ferroelectric thin film |
| 04/28/1999 | EP0911833A2 Multi-level non-volatile memory with error detection and correction |
| 04/28/1999 | EP0910800A2 A magnetic field sensor and method of manufacturing a magnetic field sensor |
| 04/28/1999 | CN1215250A Secondary read out amplifier with window discriminator for self-timing operation |
| 04/28/1999 | CN1215212A Method and device for reducing bias current in reference voltage circuit |
| 04/28/1999 | CN1215211A Dynamic type semiconductor memory device with valve value compensation function |
| 04/27/1999 | USRE36203 Semiconductor memory circuit |
| 04/27/1999 | US5898631 Semiconductor storage |
| 04/27/1999 | US5898630 Dynamic nonvolatile memory cell |
| 04/27/1999 | US5898624 Noise restraining semiconductor memory device |
| 04/27/1999 | US5898619 Memory cell having a plural transistor transmission gate and method of formation |
| 04/27/1999 | US5898614 Non-volatile semiconductor memory device |
| 04/27/1999 | US5898612 Magnetic memory cell with increased GMR ratio |
| 04/27/1999 | US5898611 SRAM with high speed read/write operation |
| 04/27/1999 | US5898610 Method and apparatus for bit cell ground choking for improved memory write margin |
| 04/27/1999 | US5898609 Ferroelectric memory having circuit for discharging pyroelectric charges |
| 04/27/1999 | US5898608 Method for operating a ferroelectric memory |
| 04/27/1999 | US5898331 Semiconductor memory having signal input circuit of synchronous type |
| 04/27/1999 | US5898316 Mode setting circuit of semiconductor device |