| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 10/07/1998 | CN1195138A Byte write capability for memory array |
| 10/06/1998 | US5819305 Method and apparatus for configuring operating modes in a memory |
| 10/06/1998 | US5818895 High-speed counter circuit |
| 10/06/1998 | US5818792 Semiconductor memory device and memory module using the same |
| 10/06/1998 | US5818790 Method for driving word lines in semiconductor memory device |
| 10/06/1998 | US5818788 Circuit technique for logic integrated DRAM with SIMD architecture and a method for controlling low-power, high-speed and highly reliable operation |
| 10/06/1998 | US5818787 Semiconductor memory device |
| 10/06/1998 | US5818784 Semiconductor memory device and memory system |
| 10/06/1998 | US5818783 Automatic mode selection circuit for semiconductor memory device |
| 10/06/1998 | US5818782 Data transmission circuit, data line driving circuit, amplifying circuit, semiconductor integrated circuit, and semiconductor memory |
| 10/06/1998 | US5818777 Circuit for implementing and method for initiating a self-refresh mode |
| 10/06/1998 | US5818776 Semiconductor memory device and method of reading data therefrom |
| 10/06/1998 | US5818775 Static ram with reduced power consumption |
| 10/06/1998 | US5818774 Apparatus and method for a data path implemented using non-differential, current mode techniques |
| 10/06/1998 | US5818773 Semiconductor storage device |
| 10/06/1998 | US5818771 Semiconductor memory device |
| 10/06/1998 | US5818770 Circuit and method for write recovery control |
| 10/06/1998 | US5818768 Operation mode setting circuit in semiconductor device |
| 10/06/1998 | US5818767 Wire control circuit and method |
| 10/06/1998 | US5818765 Semiconductor memory device having auxiliary memory |
| 10/06/1998 | US5818762 Memory having charge-carrying floating gate memory cells with time/voltage dependent refresh |
| 10/06/1998 | US5818757 Analog and multi-level memory with reduced program disturb |
| 10/06/1998 | US5818753 Electrically-erasable and programmable ROM with pulse-driven memory cell |
| 10/06/1998 | US5818751 Single-port SRAM with no read/write collisions |
| 10/06/1998 | US5818750 Static memory cell |
| 10/06/1998 | US5818316 Nonvolatile programmable switch |
| 10/06/1998 | US5818290 Bias voltage controlling apparatus with complete feedback control |
| 10/06/1998 | US5818285 Fuse signature circuits for microelectronic devices |
| 10/06/1998 | US5818268 Circuit for detecting leakage voltage of MOS capacitor |
| 10/06/1998 | US5818266 Data transmission circuit for a semiconductor memory device |
| 10/06/1998 | US5818258 Integrated circuit output buffers having duration sensitive output voltage, and related buffering methods |
| 10/06/1998 | US5818253 Signal transmitting device, circuit block and integrated circuit suited to fast signal transmission |
| 10/06/1998 | US5818212 Reference voltage generating circuit of a semiconductor memory device |
| 10/01/1998 | DE19735137C1 Data content of memory cells analysing circuit for DRAM |
| 10/01/1998 | DE19735136C1 Data content of memory cell analysing circuit for DRAM |
| 09/30/1998 | EP0867907A2 Electron emission device for generating and emitting spin-polarized electrons |
| 09/30/1998 | EP0867883A2 Definition of a pipelining memory stage by generating a delayed transition detection pulse |
| 09/30/1998 | EP0867068A1 Delay circuit and memory using the same |
| 09/30/1998 | EP0867026A1 Low voltage dynamic memory |
| 09/30/1998 | CN1194716A Electrically programmable memory, method of programming and reading method |
| 09/30/1998 | CN1194702A Field programmable gate array with distributed RAM and increased cell utilization |
| 09/30/1998 | CN1194502A 半导体器件及其输入和输出电路 The semiconductor device and the input and output circuits |
| 09/30/1998 | CN1194441A Internal constant voltage control circuit for memory device |
| 09/30/1998 | CN1194440A 半导体集成电路 The semiconductor integrated circuit |
| 09/30/1998 | CN1040056C 输入缓冲器 Input Buffer |
| 09/29/1998 | US5815511 Semiconductor integrated circuit equipped with test circuit |
| 09/29/1998 | US5815462 Synchronous semiconductor memory device and synchronous memory module |
| 09/29/1998 | US5815460 Memory circuit sequentially accessible by arbitrary address |
| 09/29/1998 | US5815459 Address decoding . . . semiconductor memory |
| 09/29/1998 | US5815457 Bit line selection decoder for an electronic memory |
| 09/29/1998 | US5815456 Multibank -- multiport memories and systems and methods using the same |
| 09/29/1998 | US5815453 Semiconductor memory device having redundant decoder with subtantially constant margin regardless of power voltage level |
| 09/29/1998 | US5815452 High-speed asynchronous memory with current-sensing sense amplifiers |
| 09/29/1998 | US5815451 Dynamic semiconductor memory device having a precharge circuit using low power consumption |
| 09/29/1998 | US5815450 Semiconductor memory device |
| 09/29/1998 | US5815446 Semiconductor memory device |
| 09/29/1998 | US5815443 Memory cell |
| 09/29/1998 | US5815442 Data transfer apparatus with large noise margin and reduced power dissipation |
| 09/29/1998 | US5815441 Non-volatile semiconductor memory device |
| 09/29/1998 | US5815439 Integrated circuit memory system |
| 09/29/1998 | US5815436 Multi-level nonvolatile semiconductor memory device having improved programming level and read/write multi-level data circuits |
| 09/29/1998 | US5815434 Multiple writes per a single erase for a nonvolatile memory |
| 09/29/1998 | US5815433 Mask ROM device with gate insulation film based in pad oxide film and/or nitride film |
| 09/29/1998 | US5815432 Single-ended read, dual-ended write SCRAM cell |
| 09/29/1998 | US5815431 Non-volatile digital circuits using ferroelectric capacitors |
| 09/29/1998 | US5815430 Circuit and method for reducing compensation of a ferroelectric capacitor by multiple pulsing of the plate line following a write operation |
| 09/29/1998 | US5815428 Semiconductor memory device having hierarchical bit line structure |
| 09/29/1998 | US5815425 Combined digital write and analog rewrite process for non-volatile memory |
| 09/29/1998 | US5815169 Frame memory device for graphics allowing simultaneous selection of adjacent horizontal and vertical addresses |
| 09/29/1998 | US5815032 Semiconductor integrated circuit inputting/outputting data |
| 09/29/1998 | US5815029 Semiconductor circuit and semiconductor circuit device |
| 09/29/1998 | US5814851 Semiconductor memory device using a plurality of internal voltages |
| 09/24/1998 | DE19800344A1 Double word line decoder circuit for DRAM memory cells |
| 09/24/1998 | DE19742162A1 Clock signal controller for data output buffer |
| 09/24/1998 | DE19736416A1 SRAM with base layer of P conductivity |
| 09/24/1998 | CA2229385A1 Byte write capability for memory array |
| 09/23/1998 | EP0866465A1 Semiconductor memory device |
| 09/23/1998 | EP0782747A4 Memory with stress circuitry for detecting defects |
| 09/23/1998 | CN1193846A Semiconductor integrated circuits |
| 09/22/1998 | US5812842 Method for initializing and reprogramming a control operation feature of a memory device |
| 09/22/1998 | US5812492 Control signal generation circuit and semiconductor memory device that can correspond to high speed external clock signal |
| 09/22/1998 | US5812491 Mode register control circuit and semiconductor device having the same |
| 09/22/1998 | US5812490 Synchronous dynamic semiconductor memory device capable of restricting delay of data output timing |
| 09/22/1998 | US5812489 Single-chip synchronous dynamic random access memory (DRAM) system |
| 09/22/1998 | US5812488 Synchronous burst extended data out dram |
| 09/22/1998 | US5812486 Dual port ram |
| 09/22/1998 | US5812485 Synchronous graphic RAM having block write control function |
| 09/22/1998 | US5812483 Integrated circuit memory devices including split word lines and predecoders and related methods |
| 09/22/1998 | US5812482 Wordline wakeup circuit for use in a pulsed wordline design |
| 09/22/1998 | US5812481 Semiconductor integrated circuit device allowing change of product specification and chip screening method therewith |
| 09/22/1998 | US5812477 Antifuse detection circuit |
| 09/22/1998 | US5812476 Refresh circuit for DRAM with three-transistor type memory cells |
| 09/22/1998 | US5812475 Programmable refresh circuits and methods for integrated circuit memory devices |
| 09/22/1998 | US5812466 Column redundancy circuit for a semiconductor memory device |
| 09/22/1998 | US5812464 Column select signal control circuits and methods for integrated circuit memory devices |
| 09/22/1998 | US5812458 Electrically-erasable and programmable ROM with pulse-driven memory cells |
| 09/22/1998 | US5812449 Flash EEPROM cell, method of manufacturing the same, method of programming and method of reading the same |
| 09/22/1998 | US5812447 Method and apparatus to write and/or read two types of data from memory |
| 09/22/1998 | US5812445 Low voltage, low power operable static random access memory device |
| 09/22/1998 | US5812444 Semiconductor memory device with bit line contact areas and storage capacitor contact areas |