Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
02/1999
02/09/1999US5870339 MOS semiconductor device with memory cells each having storage capacitor and transfer transistor
02/09/1999US5870338 Circuit and method for reading and writing data in a memory device
02/09/1999US5870335 Integrated circuit memory system
02/09/1999US5870331 Application-specific SRAM memory cell for low voltage, high speed operation
02/09/1999US5870330 Static random access memory cell
02/09/1999US5870329 Enhanced ASIC process cell
02/09/1999US5870328 Bistable magnetic element and method of manufacturing the same
02/09/1999US5870218 Nonvolatile semiconductor memory device which stores multi-value information
02/09/1999US5869997 Intermediate potential generating circuit
02/09/1999US5869963 Thin lamination comprising platinum-manganese alloy film used as antiferromagnetic layer(s) to achieve an exchange anisotropic magnetic field; sensitivity
02/09/1999US5869845 Resonant tunneling memory
02/09/1999US5869843 Memory array having a multi-state element and method for forming such array or cells thereof
02/04/1999DE19834416A1 Clock signal generator operating as delay locked loop
02/04/1999DE19834415A1 Semiconductor memory for use where fast reading times are required
02/04/1999DE19832960A1 DRAM semiconductor memory with burn-in function
02/04/1999DE19804009A1 Solid state memory cell circuit
02/03/1999EP0895355A2 Digitally Controlled Delay Circuit
02/03/1999EP0895246A1 A single chip controller-memory device and a memory architecture and methods suitable for implementing the same
02/03/1999EP0895245A2 Synchronous semiconductor memory device
02/03/1999EP0895162A2 Enhanced dram with embedded registers
02/03/1999EP0895160A1 Semiconductor memory with select line clamping circuit for preventing malfunction
02/03/1999EP0894342A1 Geometrically enhanced magnetoresistance in trilayer tunnel junctions
02/03/1999EP0894323A1 Multibit single cell memory having tapered contact
02/03/1999CN1206954A Intermediate voltage generating circuit
02/03/1999CN1206917A Improved dynamic ram equalizer circuit and equalizing method
02/03/1999CN1041975C Semiconductor IC with stress circuit and method for supplying stress voltage thereof
02/02/1999US5867447 Synchronous semiconductor memory having a write execution time dependent upon a cycle time
02/02/1999US5867443 Shared bitline heterogeneous memory
02/02/1999US5867442 Variable output voltage booster circuits and methods
02/02/1999US5867440 Semiconductor storage device with improved layout of power supply lines
02/02/1999US5867439 Semiconductor memory device having internal address converting function, whose test and layout are conducted easily
02/02/1999US5867438 For controlling a refresh operation with control signals
02/02/1999US5867437 For reading and writing data into a random access memory array
02/02/1999US5867436 Random access memory with a plurality amplifier groups for reading and writing in normal and test modes
02/02/1999US5867432 Clock control circuit
02/02/1999US5867429 High density non-volatile flash memory without adverse effects of electric field coupling between adjacent floating gates
02/02/1999US5867428 Nonvolatile memory system semiconductor memory and writing method
02/02/1999US5867427 Electrically writable nonvolatile semiconductor memory device
02/02/1999US5867423 Memory circuit and method for multivalued logic storage by process variations
02/02/1999US5867421 Integrated circuit memory device having reduced stress across large on-chip capacitor
02/02/1999US5867418 Semiconductor memory device and semiconductor device
02/02/1999US5867053 Multiplexed output circuit and method of operation thereof
02/02/1999US5867040 Integrated circuit with stacked sub-circuits between Vcc and ground so as to conserve power and reduce the voltage across any one transistor
02/02/1999US5866928 Integrated memory device
02/02/1999US5866457 Semiconductor read-only memory device and method of fabricating the same
01/1999
01/28/1999WO1999004551A1 A replenishable one time use camera system
01/28/1999WO1999004398A1 Memory with processing function
01/28/1999WO1999004368A1 A camera with internal printing system
01/27/1999EP0893868A2 Protection circuit for output drivers
01/27/1999CN1206489A Memory
01/27/1999CN1206247A Improved techniques for reducing redundant element fuses in dynamic random access memory array
01/27/1999CN1206198A Apparatus for controlling circuit response during power-up
01/27/1999CN1206197A DRAM unit device and manufacturing method thereof
01/27/1999CN1206196A Data determining circuitry and data determining method
01/27/1999CN1206195A Semiconductor memory device with input/output masking function without destruction of data bit
01/27/1999CN1206194A Dynamic memory module capable of being pre-aging tested and its circuit board
01/27/1999CN1206175A Exchange bonding film and magneto-resistive effect element and head using the same
01/26/1999USRE36061 Integrated semiconductor memory
01/26/1999US5864696 Circuit and method for setting the time duration of a write to a memory cell
01/26/1999US5864569 Method and apparatus for performing error correction on data read from a multistate memory
01/26/1999US5864567 Data memory apparatus
01/26/1999US5864511 Semiconductor memory device using cross-coupled load and precharge circuit for bit line pairs
01/26/1999US5864510 Semiconductor memory device having a bit compressed test mode and a check mode selecting section
01/26/1999US5864508 Dynamic random-access memory with high-speed word-line driver circuit
01/26/1999US5864507 Dual level wordline clamp for reduced memory cell current
01/26/1999US5864506 Memory having selectable output strength
01/26/1999US5864505 Random access memory with plural simultaneously operable banks
01/26/1999US5864504 Voltage generating circuit
01/26/1999US5864498 Ferromagnetic memory using soft magnetic material and hard magnetic material
01/26/1999US5864497 Memory device having divided global bit lines
01/26/1999US5864496 High density semiconductor memory having diagonal bit lines and dual word lines
01/26/1999US5864247 Voltage detection circuit, power-on/off reset circuit, and semiconductor device
01/26/1999US5864152 Semiconductor memory and method of writing, reading, and sustaining data
01/26/1999CA1340340C Non-volatile memory circuit using ferroelectric capacitor storage element
01/21/1999DE19809271A1 Semiconductor dynamic memory device with test configuration
01/20/1999EP0892409A2 Semiconductor memory device
01/20/1999EP0892408A2 Ferroelectric memory device
01/20/1999CN1205522A Semiconductor device having contact check circuit
01/20/1999CN1205476A Improved redundant circuits and methods therefor
01/19/1999US5862396 Memory LSI with arithmetic logic processing capability, main memory system using the same, and method of controlling main memory system
01/19/1999US5862098 Word line driver circuit for semiconductor memory device
01/19/1999US5862097 Semiconductor memory device
01/19/1999US5862096 Semiconductor memory device having optimally arranged internal down-converting circuitry
01/19/1999US5862095 Semiconductor memory having both a refresh operation cycle and a normal operation cycle and employing an address non-multiplex system
01/19/1999US5862094 Semiconductor device and a semiconductor memory device
01/19/1999US5862093 Dynamic memory device with circuits for setting self-refreshing period
01/19/1999US5862092 Read bitline writer for fallthru in fifos
01/19/1999US5862090 Semiconductor memory device having cell array divided into a plurality of cell blocks
01/19/1999US5862089 Method and memory device for dynamic cell plate sensing with ac equilibrate
01/19/1999US5862087 Redundancy circuit for memory devices having high frequency addressing cycles
01/19/1999US5862086 Semiconductor storage device
01/19/1999US5862084 Semiconductor memory device
01/19/1999US5862081 Multi-state flash EEPROM system with defect management including an error correction scheme
01/19/1999US5862080 Multi-state flash EEprom system with defect handling
01/19/1999US5862074 Integrated circuit memory devices having reconfigurable nonvolatile multi-bit memory cells therein and methods of operating same
01/19/1999US5862072 Memory array architecture and method for dynamic cell plate sensing
01/19/1999US5861771 Regulator circuit and semiconductor integrated circuit device having the same
01/19/1999US5861767 For generating a signal for controlling current
01/19/1999US5861648 Capacitor unit of a booster circuit whose low-voltage operating point margin can be expanded while an increase in area occupied thereby is suppressed
01/14/1999WO1998036587A3 Queuing structure and method for prioritization of frames in a network switch