| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 01/14/1999 | DE19807012A1 Non-volatile memory array of EEPROM cells |
| 01/13/1999 | EP0890954A2 Single-ended read, dual-ended write SRAM cell |
| 01/13/1999 | EP0890953A2 Memory device providing burst read access and write access from a single address input |
| 01/13/1999 | EP0890173A1 Circuit arrangement with a plurality of electronic circuit components |
| 01/13/1999 | EP0826218A4 A modular cache memory battery backup system |
| 01/13/1999 | CN1204893A Interface circuit and method of setting determination level therefor |
| 01/13/1999 | CN1204859A Current detection type sense amplifier |
| 01/12/1999 | US5860121 Method and apparatus for programming electrically reprogrammable non-volatile memory and a unit including such apparatus |
| 01/12/1999 | US5860118 SRAM write partitioning |
| 01/12/1999 | US5860106 Method and apparatus for dynamically adjusting power/performance characteristics of a memory subsystem |
| 01/12/1999 | US5859858 Method and apparatus for correcting a multilevel cell memory by using error locating codes |
| 01/12/1999 | US5859809 Semiconductor device of daisy chain structure having independent refresh apparatus |
| 01/12/1999 | US5859807 Semiconductor integrated circuit device having a controlled overdriving circuit |
| 01/12/1999 | US5859806 Semiconductor memory device and computer |
| 01/12/1999 | US5859805 Dynamic semiconductor memory device having an improved sense amplifier layout arrangement |
| 01/12/1999 | US5859802 Integrated circuit memory devices having main and section row decoders for providing improved burst mode operation |
| 01/12/1999 | US5859799 Semiconductor memory device including internal power supply circuit generating a plurality of internal power supply voltages at different levels |
| 01/12/1999 | US5859795 Multi-level memory circuits and corresponding reading and writing methods |
| 01/12/1999 | US5859794 Multilevel memory cell sense amplifier system and sensing methods |
| 01/12/1999 | US5859793 Synchronous semiconductor memory device |
| 01/12/1999 | US5859753 Spin valve magnetoresistive head with spun valves connected in series |
| 01/12/1999 | US5859571 Frequency trimmable oscillator and frequency multiplier |
| 01/12/1999 | US5859548 Charge recycling differential logic (CRDL) circuit and devices using the same |
| 01/12/1999 | US5859544 Dynamic configurable elements for programmable logic devices |
| 01/12/1999 | US5859460 Tri-state read-only memory device and method for fabricating the same |
| 01/12/1999 | US5859454 Nonvolatile memory device |
| 01/07/1999 | WO1999000846A1 Semiconductor integrated circuit device |
| 01/07/1999 | WO1999000798A1 Ferroelelectric memory device and method of driving the same |
| 01/07/1999 | WO1999000752A1 Method and apparatus for incorporating dynamic random access memory design modules into an integrated circuit chip design |
| 01/07/1999 | EP0889591A1 Method and corresponding circuit to prevent a parasitic transistor turn on in an output stage of an electronic circuit |
| 01/07/1999 | EP0889480A2 Improved dynamic access memory equalizer circuits and methods therefor |
| 01/07/1999 | EP0889408A2 Techniques for reducing the amount of fuses in a DRAM with redundancy |
| 01/07/1999 | EP0888619A1 Electronic memory |
| 01/07/1999 | EP0888618A1 Second-layer phase change memory array on top of a logic device |
| 01/07/1999 | DE19807298A1 Synchronous semiconductor memory arrangement |
| 01/06/1999 | CN1204127A Test method of high speed memory devices in which limit conditions for clock signals are defined |
| 01/06/1999 | CN1204126A Synchronous semiconductor memory device capable of reducing electricity consumption on standby |
| 01/06/1999 | CN1204086A Semiconductor storage device of high speed buffer memory device |
| 01/06/1999 | CN1204058A Test method of integrated circuit devices by using dual edge clock technique |
| 01/06/1999 | CN1041581C Semiconductor memory and method of setting type |
| 01/06/1999 | CN1041580C Semiconductor storage device |
| 01/05/1999 | USRE36027 Random access memory of a CSL system with a bit line pair and an I/O line pair independently set to different precharge voltages |
| 01/05/1999 | US5856982 High-speed disturb testing method and word line decoder in semiconductor memory device |
| 01/05/1999 | US5856952 Integrated circuit memory devices including a plurality of row latch circuits and related methods |
| 01/05/1999 | US5856951 Semiconductor memory device with an improved hierarchical power supply line configuration |
| 01/05/1999 | US5856947 Integrated DRAM with high speed interleaving |
| 01/05/1999 | US5856945 Method for preventing sub-threshold leakage in flash memory cells to achieve accurate reading, verifying, and fast over-erased Vt correction |
| 01/05/1999 | US5856942 For erasing and verifying the memory cells |
| 01/05/1999 | US5856940 Low latency DRAM cell and method therefor |
| 01/05/1999 | US5856939 Low voltage dynamic memory |
| 01/05/1999 | US5856938 Small-sized multi-valued semiconductor memory device with coupled capacitors between divided bit lines |
| 01/05/1999 | US5856756 For generating an internal voltage from an external voltage |
| 01/05/1999 | US5856748 Sensing amplifier with current mirror |
| 01/05/1999 | US5856708 Polycide/poly diode SRAM load |
| 01/05/1999 | CA2163580C Synchronous memory device |
| 12/30/1998 | EP0887863A2 DRAM with gain memory cells |
| 12/30/1998 | EP0887804A1 Read method and circuit for dynamic memory |
| 12/30/1998 | EP0887803A2 Computer Memory controller |
| 12/30/1998 | EP0887801A2 Apparatus for controlling circuit response during power-up |
| 12/30/1998 | EP0887734A2 High speed electrical signal interconnect structure |
| 12/30/1998 | EP0886865A1 Cell plate referencing for dram sensing |
| 12/30/1998 | EP0886864A1 Programming flash memory using distributed learning methods |
| 12/30/1998 | CN1203427A Semiconductor memory |
| 12/30/1998 | CN1203426A Semiconductor memory device which can be set one from multiple threshold value |
| 12/30/1998 | CN1203425A Semiconductor memory |
| 12/30/1998 | CN1203424A Ferroelectric memory device |
| 12/29/1998 | US5854967 Device and method for photoactivation |
| 12/29/1998 | US5854772 Decoder circuit with less transistor elements |
| 12/29/1998 | US5854771 Semiconductor memory device including copy circuit |
| 12/29/1998 | US5854768 Semiconductor integrated circuit device |
| 12/29/1998 | US5854635 Video storage device |
| 12/29/1998 | US5854562 Sense amplifier circuit |
| 12/29/1998 | US5854508 Semiconductor memory device having zigzag bonding pad arrangement |
| 12/29/1998 | US5854497 Semiconductor memory device |
| 12/29/1998 | CA2126405C Power regulation for redundant battery supplies |
| 12/24/1998 | DE19757889A1 Semiconductor memory device, e.g. DRAM, with test mode |
| 12/24/1998 | DE19753496A1 Semiconductor memory, e.g. SDRAM |
| 12/24/1998 | DE19742702A1 Address junction detecting circuit for address junction signal generation |
| 12/23/1998 | WO1998058385A1 Memory element with energy control mechanism |
| 12/23/1998 | WO1998058383A2 Electrically addressable passive device, method for electrical addressing of the same and uses of the device and the method |
| 12/23/1998 | WO1998058382A1 Semiconductor integrated circuit device |
| 12/23/1998 | WO1998058381A1 Method and apparatus for local control signal generation in a memory device |
| 12/23/1998 | WO1998058380A1 Variable voltage isolation gate |
| 12/23/1998 | EP0886321A1 Threshold voltage adjusting method for a MIS device and charge detecting device |
| 12/23/1998 | EP0886279A2 Address decoder, simiconductor memory and semiconductor device |
| 12/23/1998 | EP0886213A2 Technique for reducing the amount of fuses in a DRAM with redundancy |
| 12/23/1998 | EP0885447A1 Thermal sensing polymeric capacitor |
| 12/23/1998 | CN1202764A Level converter circuit |
| 12/23/1998 | CN1202763A Delay circuit device |
| 12/23/1998 | CN1041364C Tannel diode and storing element with such tannel diode |
| 12/23/1998 | CN1041355C Device patching fault dynamic RAM by using cache buffer memory |
| 12/22/1998 | US5852586 Single-chip synchronous dynamic random access memory (DRAM) system including first address generator operable in first and second modes |
| 12/22/1998 | US5852585 Addressing unit |
| 12/22/1998 | US5852584 Dynamic random access memory of a plurality of banks exhibiting high speed activation operation of sense amplifier |
| 12/22/1998 | US5852579 Method and circuit for preventing and/or inhibiting contention in a system employing a random access memory |
| 12/22/1998 | US5852575 Apparatus and method for reading multi-level data stored in a semiconductor memory |
| 12/22/1998 | US5852574 High density magnetoresistive random access memory device and operating method thereof |
| 12/22/1998 | US5852573 Polyload sram memory cell with low stanby current |
| 12/22/1998 | US5852572 Small-sized static random access memory cell |
| 12/22/1998 | US5852571 Nonvolatile ferroelectric memory with folded bit line architecture |