Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/1998
12/01/1998US5844832 Cell array structure for a ferroelectric semiconductor memory and a method for sensing data from the same
12/01/1998US5844831 Ferroelectric memory devices and methods of using ferroelectric capacitors
12/01/1998US5844767 Level converting circuit for converting level of an input signal, internal potential generating circuit for generating internal potential, internal potential generating unit generating internal potential highly reliable semiconductor device and method of
12/01/1998US5844755 Giant magnetoresistive information recording medium, and associated recording and reproducing method and apparatus
12/01/1998US5844438 Circuit for generating an internal clock for data output buffers in a synchronous DRAM devices
12/01/1998US5844429 Of a semiconductor device
12/01/1998US5844262 Semiconductor device for reducing effects of noise on an internal circuit
11/1998
11/25/1998CN1200075A Packing material, base material for adhesive tape, or separator
11/24/1998US5841731 Semiconductor device having externally settable operation mode
11/24/1998US5841730 Semiconductor memory device having synchronous write driver circuit
11/24/1998US5841729 Semiconductor memory device in which data are read and written asynchronously with application of address signal
11/24/1998US5841727 Semiconductor memory device
11/24/1998US5841726 Method for initializing and reprogramming a control operation feature of a memory device
11/24/1998US5841720 Memory array
11/24/1998US5841719 Data latching circuit for read-out operations of data from memory device
11/24/1998US5841717 Semiconductor memory device facilitating use of a high frequency clock signal
11/24/1998US5841716 Static type semiconductor memory device having a digit-line potential equalization circuit
11/24/1998US5841715 Integrated circuit I/O using high performance bus interface
11/24/1998US5841714 Supervoltage circuit
11/24/1998US5841712 Dual comparator circuit and method for selecting between normal and redundant decode logic in a semiconductor memory device
11/24/1998US5841711 Semiconductor memory device with redundancy switching method
11/24/1998US5841709 Memory having and method for testing redundant memory cells
11/24/1998US5841708 Semiconductor memory device having small chip size and redundancy access time
11/24/1998US5841707 Apparatus and method for a programmable interval timing generator in a semiconductor memory
11/24/1998US5841706 Semiconductor memory device capable of high speed operation in low power supply voltage
11/24/1998US5841705 Semiconductor memory device having controllable supplying capability of internal voltage
11/24/1998US5841704 Static RAM
11/24/1998US5841702 Output circuit for memory device
11/24/1998US5841695 Memory system using multiple storage mechanisms to enable storage and retrieval of more than two states in a memory cell
11/24/1998US5841693 Non-volatile memory using field effect transistors having dual floating gates for storing two bits per cell
11/24/1998US5841692 Magnetic tunnel junction device with antiferromagnetically coupled pinned layer
11/24/1998US5841691 Adjustable cell plate generator
11/24/1998US5841690 Semiconductor memory
11/24/1998US5841688 Matched delay word line strap
11/24/1998US5841611 Magnetoresistance effect device and magnetoresistance effect type head, memory device, and amplifying device using the same
11/24/1998US5841580 Memory device
11/24/1998US5841314 Charge pump type of negative voltage generator circuit and method
11/24/1998US5841150 Silicon base, oxide layer, diode, chalcogenide memory element; minimized size
11/19/1998WO1998035240A3 Magnetic sensor
11/19/1998DE19705355A1 Verfahren zur Minimierung der Zugriffszeit bei Halbleiterspeichern A method for minimizing the access time in semiconductor memories
11/18/1998EP0878804A2 Multiple transistor dynamic random access memory array architecture with simultaneous refresh of multiple memory cells during a read operation
11/18/1998CN1199229A Low power memory including selective precharge circuit
11/18/1998CN1199206A IC card
11/17/1998US5838990 Circuit in a semiconductor memory for programming operation modes of the memory
11/17/1998US5838632 Semiconductor memory apparatus
11/17/1998US5838630 Integrated circuit device, semiconductor memory, and integrated circuit system coping with high-frequency clock signal
11/17/1998US5838629 Dynamic random access memory device
11/17/1998US5838622 In a memory
11/17/1998US5838621 Spare decoder circuit
11/17/1998US5838612 Reading circuit for multilevel non volatile memory cell devices
11/17/1998US5838610 Semiconductor memory device having multilevel memory cell array
11/17/1998US5838609 Integrated semiconductor device having negative resistance formed of MIS switching diode
11/17/1998US5838608 Multi-layer magnetic random access memory and method for fabricating thereof
11/17/1998US5838607 Spin polarized apparatus
11/17/1998US5838606 Memory device
11/17/1998US5838604 Semiconductor memory device with an increased band width
11/17/1998US5838469 Apparatus and method for processing data stored in page-wise memory
11/17/1998US5838188 Reference voltage generation circuit
11/17/1998US5838186 Signal output circuit with reduced noise in output signal
11/17/1998US5838177 Adjustable output driver circuit having parallel pull-up and pull-down elements
11/17/1998US5838119 Electronic charge store mechanism
11/17/1998US5838047 Semiconductor device
11/17/1998US5838020 Method and apparatus for storing data using spin-polarized electrons
11/12/1998WO1998020494A3 Memory circuit and method of operation therefor
11/12/1998DE19820465A1 Magnetoresistive effect element for magnetic head of magnetic recording device
11/12/1998DE19755143A1 Delay synchronous circuit for clock signals
11/11/1998EP0877398A2 Magnetic element and magnetic head and magnetic memory device using thereof
11/11/1998EP0877385A2 Non-disruptive, randomly addressable memory system
11/11/1998EP0877384A2 Semiconductor memory device
11/11/1998EP0877383A2 Semiconductor memory device
11/11/1998EP0877382A2 Semiconductor memory device
11/11/1998EP0877381A2 Semiconductor memory device
11/11/1998EP0876708A1 An address transition detection circuit
11/11/1998EP0655164B1 Self-testing device for storage arrangements, decoders or the like
11/11/1998EP0621537B1 Structure to recover a portion of a partially functional embedded memory
11/11/1998CN1198834A Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell
11/11/1998CN1198573A Semiconductor memory device
11/11/1998CN1198572A Read out amplifier
11/11/1998CN1040706C 半导体存储装置 The semiconductor memory device
11/10/1998USRE35953 Semiconductor dynamic memory device
11/10/1998US5836007 Methods and systems for improving memory component size and access speed including splitting bit lines and alternate pre-charge/access cycles
11/10/1998US5835966 Semiconductor memory device and memory access system using a four-state address signal
11/10/1998US5835965 Memory system with multiplexed input-output port and memory mapping capability
11/10/1998US5835956 Synchronous dram having a plurality of latency modes
11/10/1998US5835952 Monolithic image data memory system and access method that utilizes multiple banks to hide precharge time
11/10/1998US5835937 Microcomputer with an improved DRAM-controller responsible for a CBR self-refresh operation
11/10/1998US5835927 Special test modes for a page buffer shared resource in a memory device
11/10/1998US5835449 Hyper page mode control circuit for a semiconductor memory device
11/10/1998US5835448 Clock synchronous semiconductor memory device for determining an operation mode
11/10/1998US5835446 Column decoder for semiconductor memory device with prefetch scheme
11/10/1998US5835445 Semiconductor integrated circuit device having a synchronous output function with a plurality of external clocks
11/10/1998US5835444 Method for controlling data output buffer for use in operation at high frequency of synchronous memory
11/10/1998US5835443 High speed semiconductor memory with burst mode
11/10/1998US5835442 EDRAM with integrated generation and control of write enable and column latch signals and method for making same
11/10/1998US5835441 Synchronous memory device
11/10/1998US5835440 Memory device equilibration circuit and method
11/10/1998US5835439 Sub word line driving circuit and a semiconductor memory device using the same
11/10/1998US5835438 Precharge-enable self boosting word line driver for an embedded DRAM
11/10/1998US5835436 Dynamic type semiconductor memory device capable of transferring data between array blocks at high speed
11/10/1998US5835435 Method and apparatus for dynamically placing portions of a memory in a reduced power consumtion state
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