Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
05/2003
05/27/2003US6571378 Method and apparatus for a N-NARY logic circuit using capacitance isolation
05/27/2003US6571348 Method of and apparatus for providing look ahead column redundancy access within a memory
05/27/2003US6570816 Circuit and method for reducing memory idle cycles
05/27/2003US6570815 Semiconductor memory device capable of adjusting phase of output data and memory system using the same
05/27/2003US6570814 Integrated circuit device which outputs data after a latency period transpires
05/27/2003US6570812 Semiconductor memory device with improved setup time and hold time
05/27/2003US6570811 Writing operation control circuit and semiconductor memory using the same
05/27/2003US6570804 Fuse read sequence for auto refresh power reduction
05/27/2003US6570803 Memory system capable of increasing utilization efficiency of semiconductor memory device and method of refreshing the semiconductor memory device
05/27/2003US6570802 Semiconductor memory device
05/27/2003US6570801 Semiconductor memory having refresh function
05/27/2003US6570800 High speed clock synchronous semiconductor memory in which the column address strobe signal is varied in accordance with a clock signal
05/27/2003US6570799 Precharge and reference voltage technique for dynamic random access memories
05/27/2003US6570794 Twisted bit-line compensation for DRAM having redundancy
05/27/2003US6570790 Highly compact EPROM and flash EEPROM devices
05/27/2003US6570784 Programming a phase-change material memory
05/27/2003US6570783 Asymmetric MRAM cell and bit design for improving bit yield
05/27/2003US6570781 Logic process DRAM
05/27/2003US6570419 Semiconductor integrated circuit having a clock recovery circuit
05/27/2003US6570227 High-performance high-density CMOS SRAM cell
05/27/2003US6570206 Semiconductor device
05/27/2003US6569745 Shared bit line cross point memory array
05/27/2003US6569733 Gate device with raised channel and method
05/27/2003US6569727 Method of making a single-deposition-layer-metal dynamic random access memory
05/27/2003US6569719 Semiconductor device and method for producing the same
05/22/2003WO2003043088A1 Memory device
05/22/2003WO2003043036A1 Method for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory location device
05/22/2003WO2003043021A1 A multi-port static random access memory
05/22/2003WO2003043020A1 Cladding mram multiple magnetic layer device
05/22/2003WO2003043019A1 Cladding field enhancement of an mram device
05/22/2003WO2003043018A1 Magnetoresistance random access memory for improved scalability
05/22/2003WO2003043017A2 Magnetic device with magnetic tunnel junction, memory array and read/write methods using same
05/22/2003WO2003043016A2 A biasing technique for a high density sram
05/22/2003WO2003043015A2 Multiple turn for conductive line programming mram
05/22/2003WO2003043013A1 A matrix-addressable optoelectronic apparatus and electrode means in the same
05/22/2003WO2003019564A3 Magnetoresistive level generator
05/22/2003WO2003013869A3 Printing cartridge with two dimensional code identification
05/22/2003US20030097609 Flash EEprom system
05/22/2003US20030097519 Memory subsystem
05/22/2003US20030097518 Method and apparatus for integration of communication links with a remote direct memory access protocol
05/22/2003US20030095467 Test circuit for testing semiconductor memory
05/22/2003US20030095466 Semiconductor memory device
05/22/2003US20030095463 Non-volatile semiconductor memory device with enhanced erase/write cycle endurance
05/22/2003US20030095459 Partial array self-refresh
05/22/2003US20030095457 Sense amplifier circuits using a single bit line input
05/22/2003US20030095456 Sense amplifier with independent write-back capability for ferroelectric random-access memories
05/22/2003US20030095455 Semiconductor integrated circuit
05/22/2003US20030095454 Method and apparatus for standby power reduction in semiconductor devices
05/22/2003US20030095449 Semiconductor memory device and redundancy judging method
05/22/2003US20030095446 Memory array
05/22/2003US20030095444 Semiconductor memory device for providing address access time and data access time at a high speed
05/22/2003US20030095442 Method and apparatus for outputting burst read data
05/22/2003US20030095440 Nonvolatile semiconductor memory device
05/22/2003US20030095438 Nonvolatile semiconductor memory device having function of determining good sector
05/22/2003US20030095432 Nonvolatile semiconductor memory device capable of writing multilevel data at high rate
05/22/2003US20030095431 Sense amplifier for multilevel non-volatile integrated memory devices
05/22/2003US20030095430 Semiconductor memory device
05/22/2003US20030095429 Semiconductor memory device
05/22/2003US20030095427 Reduced leakage memory cell
05/22/2003US20030095426 Complementary bit PCRAM sense amplifier and method of operation
05/22/2003US20030095164 Ink jet printhead with moveable shutters
05/22/2003US20030094995 Fuse circuit
05/22/2003US20030094984 Delay locked loop
05/22/2003US20030094957 Method and logic decision device for generating ferro-electric capacitor reference voltage
05/22/2003US20030094661 Multi-threshold MIS integrated circuit device and circuit design method thereof
05/22/2003US20030094651 Transistor in semiconductor devices and method of manufacturing the same
05/22/2003US20030094640 Semiconductor device and method for driving the same
05/22/2003US20030094630 Nonvolatile ferroelectric memory device and method for driving the same
05/21/2003EP1313197A1 Thermal sensing polymeric capacitor
05/21/2003EP1312094A1 Method and apparatus for crossing clock domain boundaries
05/21/2003EP1312093A2 Memory device having posted write per command
05/21/2003EP1312092A2 Synchronized write data on a high speed memory bus
05/21/2003EP1312091A1 Memory device and method having data path with multiple prefetch i/o configurations
05/21/2003EP1311962A1 Control circuit for a dram memory
05/21/2003EP1147520B1 Vertically integrated magnetic memory
05/21/2003EP0826218B1 A modular cache memory battery backup system
05/21/2003CN1419696A Multidimeensional addressing architecture for electronic devices
05/21/2003CN1419293A Semiconductor momory
05/21/2003CN1419292A 半导体存储器 Semiconductor memory
05/21/2003CN1419291A Nonvolatile semiconductor memory
05/21/2003CN1419290A Semiconductor IC
05/21/2003CN1419243A 半导体存储器 Semiconductor memory
05/21/2003CN1419242A Film magnet memory information programming method
05/21/2003CN1419241A Film magnet memory making data write by bidirection data writing in magnetic field
05/21/2003CN1109329C Method and apparatus for magngetic recording
05/21/2003CN1109302C Circuit and method for retaining data in DRAM in portable electronic device
05/20/2003US6567923 Semiconductor memory device achieving faster operation based on earlier timings of latch operations
05/20/2003US6567904 Method and apparatus for automatically detecting whether a memory unit location is unpopulated or populated with synchronous or asynchronous memory devices
05/20/2003US6567339 Semiconductor integrated circuit
05/20/2003US6567336 Semiconductor memory for logic-hybrid memory
05/20/2003US6567333 Fuse circuit using anti-fuse and method for searching for failed address in semiconductor memory
05/20/2003US6567332 Memory devices with reduced power consumption refresh cycles
05/20/2003US6567330 Semiconductor memory device
05/20/2003US6567329 Multiple word-line accessing and accessor
05/20/2003US6567328 Memory macro with modular peripheral circuit elements
05/20/2003US6567326 Semiconductor memory device
05/20/2003US6567324 Semiconductor memory device with reduced number of redundant program sets
05/20/2003US6567322 Semiconductor memory device
05/20/2003US6567321 Semiconductor memory device using dedicated command and address strobe signal and associated method
05/20/2003US6567320 Data write circuit