| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 08/17/2004 | US6778422 Ferroelectric memory |
| 08/17/2004 | US6778421 Memory device array having a pair of magnetic bits sharing a common conductor line |
| 08/17/2004 | US6778007 Internal power voltage generating circuit |
| 08/17/2004 | US6778003 Method and circuit for adjusting a voltage upon detection of a command applied to an integrated circuit |
| 08/17/2004 | US6778002 Semiconductor integrated circuit device including a substrate bias controller and a current limiting circuit |
| 08/17/2004 | US6777920 Internal power-supply potential generating circuit |
| 08/17/2004 | US6777731 Magnetoresistive memory cell with polarity-dependent resistance |
| 08/17/2004 | US6777712 Low-power organic light emitting diode pixel circuit |
| 08/17/2004 | US6777707 Semiconductor integrated circuit with voltage down converter adaptable for burn-in testing |
| 08/17/2004 | US6777516 Polymers comprised of sandwich coordination compounds, such as eu or ce coordinated porphyrins and phthalocyanines; electrochromic displays, molecular capacitors, and batteries. |
| 08/17/2004 | US6776476 Ink jet printhead chip with active and passive nozzle chamber structures |
| 08/12/2004 | WO2004068607A1 Cpp-type giant manetoresistance effect element and magnetic component and magnetic device using it |
| 08/12/2004 | WO2004068546A2 Tunnel device level shift circuit |
| 08/12/2004 | WO2004068500A1 Nonvolatile semiconductor memory device |
| 08/12/2004 | WO2004068499A1 Fast remanent resistive ferroelectric memory |
| 08/12/2004 | WO2004068498A1 Mram architecture for low power consumption and high selectivity |
| 08/12/2004 | WO2004034470A3 Dual-port memory cell and layout design |
| 08/12/2004 | WO2004012196A3 Semiconductor memory device and method for initializing the same |
| 08/12/2004 | WO2003036884A3 Method and apparatus for integration of communication links with a remote direct memory access protocol |
| 08/12/2004 | US20040158773 Test mode control device using nonvolatile ferroelectric memory |
| 08/12/2004 | US20040158757 Interleaved delay line for phase locked and delay locked loops |
| 08/12/2004 | US20040158690 Balanced sense amplifier control for open digit line architecture memory devices |
| 08/12/2004 | US20040158671 Semiconductor storage device |
| 08/12/2004 | US20040157427 Nonvolatile magnetic memory device and manufucturing method thereof |
| 08/12/2004 | US20040156260 Main word line driver circuit receiving negative voltage in semiconductor memory device |
| 08/12/2004 | US20040156259 Semiconductor memory device |
| 08/12/2004 | US20040156257 Refresh control for semiconductor memory device |
| 08/12/2004 | US20040156256 Physically alternating sense amplifier activation |
| 08/12/2004 | US20040156255 Semiconductor memory device with memory cells arranged in high density |
| 08/12/2004 | US20040156254 Integrated memory |
| 08/12/2004 | US20040156253 Integrated memory and method for operating it |
| 08/12/2004 | US20040156249 Self-refresh apparatus and method |
| 08/12/2004 | US20040156244 Negatively charged wordline for reduced subthreshold current |
| 08/12/2004 | US20040156241 System and method for programming cells in non-volatile integrated memory devices |
| 08/12/2004 | US20040156239 Nonvolatile semiconductor memory device |
| 08/12/2004 | US20040156237 Block select circuit in a flash memory device |
| 08/12/2004 | US20040156232 Magnetic memory |
| 08/12/2004 | US20040156231 Magnetic memory |
| 08/12/2004 | US20040156230 Semiconductor memory device |
| 08/12/2004 | US20040156228 High density beta ratio independent core cell |
| 08/12/2004 | US20040156227 Reducing sub-threshold leakage in a memory array |
| 08/12/2004 | US20040156226 Externally clocked electrical fuse programming with asynchronous fuse selection |
| 08/12/2004 | US20040156225 Memory devices, and electronic systems comprising memory devices |
| 08/12/2004 | US20040155686 Analog delay locked loop having duty cycle correction circuit |
| 08/12/2004 | US20040155682 High-speed cross-coupled sense amplifier |
| 08/12/2004 | US20040155636 Semiconductor integrated circuit device |
| 08/12/2004 | US20040155307 Method for manufacture of magneto-resistive bit structure |
| 08/12/2004 | US20040155283 Memory device comprising single transistor having functions of RAM and ROM and methods for operating and manufacturing the same |
| 08/12/2004 | US20040155281 Semiconductor device formed on a SOI substrate |
| 08/12/2004 | US20040155234 Nonvolatile semiconductor memory device |
| 08/12/2004 | DE10303316A1 Schneller remanenter Speicher Fast retentive memory |
| 08/12/2004 | DE10302650A1 RAM memory with shared SA structure, e.g. DRAM semiconductor memory, has a sense amplifier that can be separately switched for each individual control line |
| 08/12/2004 | DE10260602B3 Sense amplifier for bit line signals in dynamic random-access memory using cross-coupled switching device including holding device for holding switched signal level of bit line signals |
| 08/11/2004 | EP1445774A2 Magnetic random access memory device |
| 08/11/2004 | EP1444822A1 Image sensing apparatus including a microcontroller |
| 08/11/2004 | EP1444709A1 Method for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory location device |
| 08/11/2004 | EP1444698A2 Semiconductor arrangement comprising transistors based on organic semiconductors and non-volatile read-write memory cells |
| 08/11/2004 | EP1444696A1 A matrix-addressable optoelectronic apparatus and electrode means in the same |
| 08/11/2004 | EP1232399B1 High-speed failure capture apparatus and method for automatic test equipment |
| 08/11/2004 | CN1520595A Ferroelectric memory and operating method therefor |
| 08/11/2004 | CN1520594A Non-volatile memory device having high speed page mode operation |
| 08/11/2004 | CN1520593A Sense amplifier with improved latching |
| 08/11/2004 | CN1520555A System and method for delaying strobe signal |
| 08/11/2004 | CN1519942A Strong dielectric storage and its mfg. method |
| 08/11/2004 | CN1519938A Nonvolatile semiconductor storage, its mfg. method and semiconductor integrated circuit and system |
| 08/11/2004 | CN1519861A 半导体存储装置 The semiconductor memory device |
| 08/11/2004 | CN1519860A Low voltage read amplifier device |
| 08/11/2004 | CN1519859A Semiconductor memory element and its control method |
| 08/11/2004 | CN1519858A 半导体存储装置 The semiconductor memory device |
| 08/11/2004 | CN1519857A Semiconductor memory appts. having magnetic interference ruduced |
| 08/11/2004 | CN1519856A Thermally-assisted magnetic writing using oxide layer and current-induced heating |
| 08/11/2004 | CN1519853A On-die termination circuit and method for reducing on-chip DC current, and memory system including memory device having same |
| 08/11/2004 | CN1161791C Method and apparatus for correcting multilevel cell memory by using interleaving |
| 08/11/2004 | CN1161789C Semiconductor apparatus |
| 08/11/2004 | CN1161788C Integrated storage possessing bipolar transister/double capacitor type storage unit |
| 08/11/2004 | CN1161787C Resistive ferroelectric storage cell |
| 08/10/2004 | US6775759 Sequential nibble burst ordering for data |
| 08/10/2004 | US6775736 Embedded DRAM system having wide data bandwidth and data transfer data protocol |
| 08/10/2004 | US6775201 Method and apparatus for outputting burst read data |
| 08/10/2004 | US6775198 Semiconductor storage unit |
| 08/10/2004 | US6775196 Magnetic memory having a temperature compensated write circuit |
| 08/10/2004 | US6775195 Apparatus and method for accessing a magnetoresistive random access memory array |
| 08/10/2004 | US6775194 Standby current reduction circuit applied in DRAM |
| 08/10/2004 | US6775190 Semiconductor memory device with detection circuit |
| 08/10/2004 | US6775184 Nonvolatile memory integrated circuit having volatile utility and buffer memories, and method of operation thereof |
| 08/10/2004 | US6775183 Magnetic memory device employing giant magnetoresistance effect |
| 08/10/2004 | US6775182 Integrated magnetoresistive semiconductor memory configuration |
| 08/10/2004 | US6775181 Biasing technique for a high density SRAM |
| 08/10/2004 | US6775179 Memory with shared bit lines |
| 08/10/2004 | US6775178 SEU resistant SRAM using feedback MOSFET |
| 08/10/2004 | US6775177 Semiconductor memory device switchable to twin memory cell configuration |
| 08/10/2004 | US6775176 Semiconductor memory device having memory cells requiring no refresh operations |
| 08/10/2004 | US6775174 Memory architecture for micromirror cell |
| 08/10/2004 | US6775173 Matrix-addressable apparatus with one or more memory devices |
| 08/10/2004 | US6775172 Nonvolatile ferroelectric memory and method for driving the same |
| 08/10/2004 | US6775170 Semiconductor memory device having write column select line or read column select line for shielding signal line |
| 08/10/2004 | US6774708 Voltage boosting circuit with two main charge pumps |
| 08/10/2004 | US6774705 Semiconductor integrated circuit device in which operating frequency, supply voltage and substrate bias voltage are controllable to reduce power consumption |
| 08/10/2004 | US6774703 Semiconductor device |
| 08/10/2004 | US6774677 Device for linking a processor to a memory element and memory element |