Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
02/2007
02/27/2007US7184326 Semiconductor memory
02/27/2007US7184325 Input circuit for memory device
02/27/2007US7184323 4N pre-fetch memory data transfer system
02/27/2007US7184322 Semiconductor memory device and control method thereof
02/27/2007US7184320 Storage device employing a flash memory
02/27/2007US7184318 Semiconductor memory device
02/27/2007US7184317 Method for programming multi-bit charge-trapping memory cell arrays
02/27/2007US7184316 Non-volatile memory cell array having common drain lines and method of operating the same
02/27/2007US7184315 NROM flash memory with self-aligned structural charge separation
02/27/2007US7184314 Semiconductor memory device
02/27/2007US7184311 Method and system for regulating a program voltage value during multilevel memory device programming
02/27/2007US7184310 Sequential program-verify method with result buffering
02/27/2007US7184306 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
02/27/2007US7184302 Highly efficient segmented word line MRAM array
02/27/2007US7184301 Magnetic memory cell and magnetic random access memory using the same
02/27/2007US7184300 Magneto resistance random access memory element
02/27/2007US7184299 Nonvolatile SRAM memory cell
02/27/2007US7184298 Low power programming technique for a floating body memory transistor, memory cell, and memory array
02/27/2007US7184297 Semiconductor memory device
02/27/2007US7184296 Memory device
02/27/2007US7184295 Memory device
02/27/2007US7184294 Ferroelectric-type nonvolatile semiconductor memory
02/27/2007US7184293 Crosspoint-type ferroelectric memory
02/27/2007US7184292 High speed data bus
02/27/2007US7184289 Parallel electrode memory
02/27/2007US7183835 Semiconductor device which realizes a short-circuit protection function without shunt resistor, and semiconductor device module
02/27/2007US7183825 State retention within a data processing system
02/27/2007US7183803 Input device for a semiconductor device
02/27/2007US7183621 MRAM memory cell having an electroplated bottom layer
02/27/2007US7183611 SRAM constructions, and electronic systems comprising SRAM constructions
02/27/2007US7183595 Ferroelectric memory
02/27/2007US7183163 Method of manufacturing an isolation-less, contact-less array of bi-directional read/program non-volatile floating gate memory cells with independent controllable control gates
02/27/2007US7183130 Magnetic random access memory and method of fabricating thereof
02/27/2007US7183042 Bit end design for pseudo spin valve (PSV) devices
02/27/2007US7182435 Printhead chip incorporating laterally displaceable ink flow control mechanisms
02/22/2007WO2007021668A2 Sram cell with separate read-write circuitry
02/22/2007WO2007020823A1 Magnetic memory cell, magnetic random access memory and method for reading/writing data in magnetic random access memory
02/22/2007WO2005104133B1 High density data storage
02/22/2007US20070043922 Memory system for selectively transmitting command and address signals
02/22/2007US20070043522 Semiconductor integrated circuit
02/22/2007US20070041248 Semiconductor storage device and method of manufacturing the same
02/22/2007US20070041246 Method using a one-time programmable memory cell
02/22/2007US20070041245 Set programming methods and write driver circuits for a phase-change memory array
02/22/2007US20070041243 Magnetic memory device and method of fabricating the same
02/22/2007US20070041242 Nonvolatile memory cell, storage device and nonvolatile logic circuit
02/22/2007US20070041241 Memory element
02/22/2007US20070041240 Random Access Memory With A Plurality Of Symmetrical Memory Cells
02/22/2007US20070041239 Semiconductor memory device
02/22/2007US20070041238 High density data storage devices with read/write probes with hollow or reinforced tips
02/22/2007US20070041237 Media for writing highly resolved domains
02/22/2007US20070041236 Methods and apparatuses for a sense amplifier
02/22/2007US20070041235 Semiconductor storage device
02/22/2007US20070041234 Storage device, file storage device, and computer system
02/22/2007US20070041233 Wake-up of ferroelectric thin films for probe storage
02/22/2007US20070041232 Access circuit and method for allowing external test voltage to be applied to isolated wells
02/22/2007US20070041125 Magnetic tunnel junction structure having an oxidized buffer layer and method of fabricating the same
02/22/2007US20070040856 Print roll unit with ink storage core
02/22/2007US20070040209 Novel applications for insulated gate bipolar transistors
02/22/2007DE112004002832T5 Sektorschutzschaltung für einen nichtflüchtigen Halbleiterspeicher, Sektorschutzverfahren und nichtflüchtiger Halbleiterspeicher Sector protection circuit for a nonvolatile semiconductor memory sector protection method and a non-volatile semiconductor memory
02/22/2007DE102006022124A1 Eingangsschaltung mit aktualisiertem Ausgangssignal, das mit Taktsignal synchronisiert ist With updated input circuit output signal which is synchronized with clock signal
02/22/2007DE102005038938A1 Speicherelement Memory element
02/22/2007DE102005037635A1 Embedded switching system, has detector- and control unit for detecting access to read only memory, for controlling supply voltage-control unit depending on detected result and implemented in hardware
02/21/2007EP1754231A2 Memory device with user configurable density/performance
02/21/2007EP1754230A1 Reversed magnetic tunneling junction for power efficient byte writing of mram
02/21/2007EP1623432A4 Semiconductor memory cell, array, architecture and device, and method of operating same
02/21/2007EP1623430A4 Semiconductor memory device and method of operating same
02/21/2007EP1620859A4 Reference current generator, and method of programming, adjusting and/or operating same
02/21/2007EP1550133B1 A method for making a ferroelectric memory cell in a ferroelectric memory device, and a ferroelectric memory device
02/21/2007CN1918662A Non-switching pre-and post-disturb compensational pulses
02/21/2007CN1918661A Secured phase-change devices
02/21/2007CN1918660A Memory device with several random-access memory chip
02/21/2007CN1917249A Thin film plate phase change ram circuit and manufacturing method
02/21/2007CN1917217A Dense non-volatile memory array and method of fabrication
02/21/2007CN1917086A Nonvolatile storage unit in high speed
02/21/2007CN1917085A Static random access memory and operation method
02/21/2007CN1917084A Memory controller capable of locating an open command cycle to issue a precharge packet
02/21/2007CN1917083A 半导体存储器件 A semiconductor memory device
02/21/2007CN1917082A Configurable logic memory devices and logic member based on programmable passing gate
02/21/2007CN1301584C Booster and pick-up device using such booster
02/21/2007CN1301507C Heat stable ferroelectric body memory
02/20/2007US7181643 Method for comparing the address of a memory access with an already known address of a faulty memory cell
02/20/2007US7181579 Integrated memory having redundant units of memory cells and method for testing an integrated memory
02/20/2007US7180824 Semiconductor memory device with a page mode
02/20/2007US7180822 Semiconductor memory device without decreasing performance thereof even if refresh operation or word line changing operation occur during burst operation
02/20/2007US7180820 Integrated semiconductor memory comprising at least one word line and comprising a multiplicity of memory cells
02/20/2007US7180815 Semiconductor integrated circuit device
02/20/2007US7180814 Low power circuits with small voltage swing transmission, voltage regeneration and wide bandwidth architecture
02/20/2007US7180808 Semiconductor memory device for performing refresh operation
02/20/2007US7180807 Semiconductor memory device having a delay circuit
02/20/2007US7180806 Memory device, refresh control circuit to be used for the memory device, and refresh method
02/20/2007US7180805 Differental current source for generating DRAM refresh signal
02/20/2007US7180802 Method of stress-testing an isolation gate in a dynamic random access memory
02/20/2007US7180799 Circuit for setting one of a plurality of organization forms of an integrated circuit and method for operating it
02/20/2007US7180793 Semiconductor non-volatile storage device
02/20/2007US7180789 Semiconductor memory device with MOS transistors, each having a floating gate and a control gate, and memory card including the same
02/20/2007US7180788 Nonvolatile semiconductor memory device
02/20/2007US7180787 Semiconductor memory device
02/20/2007US7180785 Nonvolatile semiconductor memory device with a plurality of sectors
02/20/2007US7180783 Non-volatile memory devices that include a programming verification function
02/20/2007US7180781 Memory block erasing in a flash memory device