| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 02/13/2007 | US7177220 Refresh counter with dynamic tracking of process, voltage and temperature variation for semiconductor memory |
| 02/13/2007 | US7177218 DRAM device with a refresh period that varies responsive to a temperature signal having a hysteresis characteristic |
| 02/13/2007 | US7177217 Method and circuit for verifying and eventually substituting defective reference cells of a memory |
| 02/13/2007 | US7177215 Semiconductor memory device operating at high speed and low power consumption |
| 02/13/2007 | US7177214 Methods and systems for dynamically selecting word line off times and/or bit line equalization start times in memory devices |
| 02/13/2007 | US7177210 Method for reading fuse information in a semiconductor memory |
| 02/13/2007 | US7177206 Power supply circuit for delay locked loop and its method |
| 02/13/2007 | US7177205 Distributed loop components |
| 02/13/2007 | US7177203 Data readout circuit and semiconductor device having the same |
| 02/13/2007 | US7177202 Method for accessing a single port memory |
| 02/13/2007 | US7177200 Two-phase programming of a flash memory |
| 02/13/2007 | US7177199 Behavior based programming of non-volatile memory |
| 02/13/2007 | US7177198 Compensated method to implement a high voltage discharge phase after erase pulse in a flash memory device |
| 02/13/2007 | US7177197 Latched programming of memory and method |
| 02/13/2007 | US7177196 Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells |
| 02/13/2007 | US7177195 Reducing the effects of noise in non-volatile memories through multiple reads |
| 02/13/2007 | US7177192 Method of operating a flash memory device |
| 02/13/2007 | US7177191 Integrated circuit including memory array incorporating multiple types of NAND string structures |
| 02/13/2007 | US7177190 Combination nonvolatile integrated memory system using a universal technology most suitable for high-density, high-flexibility and high-security sim-card, smart-card and e-passport applications |
| 02/13/2007 | US7177189 Memory defect detection and self-repair technique |
| 02/13/2007 | US7177187 Semiconductor device having a nonvolatile memory array and an authentication circuit arranged in a vertical stack configuration |
| 02/13/2007 | US7177186 High bandwidth datapath load and test of multi-level memory cells |
| 02/13/2007 | US7177185 Non-volatile flash memory device having dual-bit floating gate |
| 02/13/2007 | US7177184 Selective operation of a multi-state non-volatile memory system in a binary mode |
| 02/13/2007 | US7177183 Multiple twin cell non-volatile memory array and logic block structure and method therefor |
| 02/13/2007 | US7177182 Rewriteable electronic fuses |
| 02/13/2007 | US7177180 Method and apparatus for reading data from a ferromagnetic memory cell |
| 02/13/2007 | US7177179 Magnetic memory, and its operating method |
| 02/13/2007 | US7177178 magnetic memory layers thermal pulse transitions |
| 02/13/2007 | US7177177 Back-gate controlled read SRAM cell |
| 02/13/2007 | US7177176 Six-transistor (6T) static random access memory (SRAM) with dynamically variable p-channel metal oxide semiconductor (PMOS) strength |
| 02/13/2007 | US7177175 Low power programming technique for a floating body memory transistor, memory cell, and memory array |
| 02/13/2007 | US7177174 Ferroelectric memory device having a reference voltage generating circuit |
| 02/13/2007 | US7177171 Semiconductor device |
| 02/13/2007 | US7177170 Apparatus and method for selectively configuring a memory device using a bi-stable relay |
| 02/13/2007 | US7177123 Semiconductor integrated circuit |
| 02/13/2007 | US7176864 Display memory, driver circuit, display, and cellular information apparatus |
| 02/13/2007 | US7176824 Imprint-free coding for ferroelectric nonvolatile counters |
| 02/13/2007 | US7176763 Phase-locked loop integrated circuits having fast phase locking characteristics |
| 02/13/2007 | US7176752 Plate voltage generation circuit capable controlling dead band |
| 02/13/2007 | US7176745 Semiconductor device |
| 02/13/2007 | US7176505 Electromechanical three-trace junction devices |
| 02/13/2007 | US7176065 Magnetic tunneling junction antifuse device |
| 02/13/2007 | US7175961 Bistable molecules that undergo redox reactions, such as rotaxanes and catenanes, or that undergo an electric field induced band gap change that causes the molecules to change from a fully conjugated to a less conjugated state |
| 02/13/2007 | US7175774 Method of fabricating inkjet nozzles |
| 02/13/2007 | US7175266 Replaceable memory device for a consumable substance container, and methods |
| 02/13/2007 | CA2429366C A method for non-destructive readout and apparatus for use with the method |
| 02/08/2007 | WO2007016167A1 Programming non-volatile memory with self-adjusting maximum program loop |
| 02/08/2007 | WO2007015474A1 Magnetic memory |
| 02/08/2007 | WO2007015358A1 Magnetic random access memory and operation method thereof |
| 02/08/2007 | WO2007015355A1 Mram |
| 02/08/2007 | WO2007015055A1 Memory access |
| 02/08/2007 | WO2007014888A1 A magnetoresistive device |
| 02/08/2007 | WO2007014461A1 Voltage down converter for high speed memory |
| 02/08/2007 | WO2006058070A3 Nonvolatile memory using a universal technology suitable for sim-card, smart-card and e-passport applications |
| 02/08/2007 | WO2006012444A3 Low-power, p-channel enhancement-type metal-oxide semiconductor field-effect transistor (pmosfet) sram cells |
| 02/08/2007 | WO2005117020A3 Multimedia storage systems and methods |
| 02/08/2007 | US20070033491 Repair techniques for memory with multiple redundancy |
| 02/08/2007 | US20070033436 System and method for journal recovery for multinode environments |
| 02/08/2007 | US20070033379 Active memory processing array topography and method |
| 02/08/2007 | US20070030755 Apparatus for testing a nonvolatile memory and a method thereof |
| 02/08/2007 | US20070030751 Semiconductor memory having a short effective word line cycle time and method for reading data from a semiconductor memory of this type |
| 02/08/2007 | US20070030745 Referencing scheme for trap memory |
| 02/08/2007 | US20070030737 NAND flash memory cell programming |
| 02/08/2007 | US20070030736 Variable source resistor for flash memory |
| 02/08/2007 | US20070030729 Method of sensing an eeprom reference cell |
| 02/08/2007 | US20070030728 High speed low power annular magnetic devices based on current induced spin-momentum transfer |
| 02/08/2007 | US20070030727 Method for switching magnetic moment in magnetoresistive random access memory with low current |
| 02/08/2007 | US20070030726 Magnetic random access memory |
| 02/08/2007 | US20070030725 Apparatus and methods for storing data in a magnetic random access memory (mram) |
| 02/08/2007 | US20070030724 Memory element and memory |
| 02/08/2007 | US20070030723 Magnetic memory arrays |
| 02/08/2007 | US20070030722 Memory cell |
| 02/08/2007 | US20070030721 Device selection circuitry constructed with nanotube technology |
| 02/08/2007 | US20070030718 Magnetic logic system |
| 02/08/2007 | US20070030325 Wide-format printer with a pagewidth printhead assembly |
| 02/08/2007 | US20070030314 Micro-electromechanical nozzle assembly with an arcuate actuator |
| 02/08/2007 | US20070030310 Nozzle arrangement for an inkjet rinthead that incorporates a movement transfer mechanism |
| 02/08/2007 | US20070030045 Delay circuit and delay synchronization loop device |
| 02/08/2007 | US20070030043 Deplay circuit and delay synchronization loop device |
| 02/08/2007 | US20070030040 Delay circuit and delay synchronization loop device |
| 02/08/2007 | US20070030028 Programmable array logic circuit employing non-volatile ferromagnetic memory cells |
| 02/08/2007 | US20070029630 Integrated circuits with contemporaneously formed array electrodes and logic interconnects |
| 02/08/2007 | US20070029278 Method of fabricating printhead for ejecting ink supplied under pulsed pressure |
| 02/08/2007 | DE19513587B4 Speicherbauelement und Verfahren zum Programmieren eines Steuerbetriebsmerkmals eines Speicherbauelements Memory device and method for programming a control operation characteristic of a memory device |
| 02/08/2007 | DE102005035641A1 Herstellungsverfahren für eine Speicherzellenanordnung mit Folded-Bitline-Anordnung und entsprechende Speicherzellenanordnung mit Folded-Bitline-Anordnung Manufacturing method of a memory cell array having folded bit line arrangement and corresponding memory cell array having folded bit line arrangement |
| 02/07/2007 | EP1750281A1 Nonvolatile memory device with multiple references and corresponding control method |
| 02/07/2007 | EP1750279A2 3-level non-volatile semiconductor memory device and method of driving the same |
| 02/07/2007 | EP1750278A1 Method of programming a four-level flash memory device and a related page buffer |
| 02/07/2007 | EP1750277A1 Configuration of a multi-level flash memory device |
| 02/07/2007 | EP1750276A1 Semiconductor device |
| 02/07/2007 | EP1750275A2 Magnetic memory |
| 02/07/2007 | EP1750274A1 Magnetic memory device |
| 02/07/2007 | EP1750273A1 Memory cell with increased access reliability |
| 02/07/2007 | EP1750272A2 Semiconductor memory device and method for driving the same |
| 02/07/2007 | EP1749634A1 Molded body of thermoplastic resin having sound absorption characteristics |
| 02/07/2007 | EP1749300A1 Method and system for providing directed bank refresh for volatile memories |
| 02/07/2007 | EP1711898A4 System and method for detecting the width of a data bus |
| 02/07/2007 | EP1494868A4 Pusher actuation in a printhead chip for an inkjet printhead |
| 02/07/2007 | CN1910701A NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same |