Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
04/2007
04/24/2007US7209997 Controller device and method for operating same
04/24/2007US7209996 Multi-core multi-thread processor
04/24/2007US7209983 Sequential flow-control and FIFO memory devices that are depth expandable in standard mode operation
04/24/2007US7209402 Semiconductor memory
04/24/2007US7209401 Ring oscillator dynamic adjustments for auto calibration
04/24/2007US7209398 Semiconductor memory device having redundancy cell array shared by a plurality of memory cell arrays
04/24/2007US7209397 Memory device with clock multiplier circuit
04/24/2007US7209390 Operation scheme for spectrum shift in charge trapping non-volatile memory
04/24/2007US7209384 Planar capacitor memory cell and its applications
04/24/2007US7209383 Magnetic random access memory array having bit/word lines for shared write select and read operations
04/24/2007US7209382 Magnetic random access memory
04/24/2007US7209381 Digital processing device with disparate magnetoelectronic gates
04/24/2007US7209380 Magnetic memory device and method of reading the same
04/24/2007US7209379 Storage device and semiconductor device
04/24/2007US7209378 Columnar 1T-N memory cell structure
04/24/2007US7209377 Ferroelectric memory device, electronic device
04/24/2007US7209015 Oscillator circuit having a temperature dependence
04/24/2007US7208999 Step-down circuit with stabilized output voltage
04/24/2007US7208845 Vibration based power generator
04/24/2007US7208823 Semiconductor arrangement comprising transistors based on organic semiconductors and non-volatile read-write memory cells
04/24/2007US7208813 Capacitor layout orientation
04/24/2007US7208786 Memory device
04/24/2007US7208780 Semiconductor storage device
04/24/2007US7208367 Methods of fabricating ferroelectric memory devices having expanded plate lines
04/24/2007US7208323 Method for forming magneto-resistive memory cells with shape anisotropy
04/24/2007US7207657 Ink jet printhead nozzle arrangement with actuated nozzle chamber closure
04/24/2007US7207654 Ink jet with narrow chamber
04/19/2007WO2007043157A1 Nonvolatile memory device storing data based on change in transistor characteristics
04/19/2007WO2007042563A1 A magnetoresistive tunnel junction magnetic device and its application to mram
04/19/2007WO2006107409A3 Decoding circuit for non-binary groups of memory line drivers
04/19/2007WO2006026676A3 Seu-tolerant qdi circuits
04/19/2007US20070086257 Tamper response system for integrated circuits
04/19/2007US20070086248 Method and apparatus for a dual power supply to embedded non-volatile memory
04/19/2007US20070086237 Shape memory device
04/19/2007US20070086236 MRAM memory cell having a weak intrinsic anisotropic storage layer and method of producing the same
04/19/2007US20070086235 Phase-change memory device and method of fabricating the same
04/19/2007US20070086234 Magnetic memory
04/19/2007US20070086233 Method for Reducing Word Line Current in Magnetoresistive Random Access Memory and Structure Thereof
04/19/2007US20070086232 Ring oscillator row circuit for evaluating memory cell performance
04/19/2007US20070086231 Nonvolatile ferroelectric memory device
04/19/2007US20070086230 Nonvolatile latch circuit and system on chip with the same
04/19/2007US20070085713 Imprint-free coding for ferroelectric nonvolatile counters
04/19/2007US20070085599 Potential Detector and Semiconductor Integrated Circuit
04/19/2007DE10253872B4 Speicherbauelement mit Abtastverstärkerschaltung Memory device with sense amplifier
04/19/2007DE102005029872A1 Memory cell e.g. phase changing memory, for use in memory arrangement, has N-channel MOS transistors and read terminals, where cell is designed such that information stored in cell is detected by differential read operation
04/18/2007EP1774655A1 Encoding of data words using three or more signal levels
04/18/2007EP1774591A1 An organic ferroelectric or electret device with via connections and a method for its manufacture
04/18/2007EP1654736A4 Method and system for optimizing reliability and performance of programming data in non-volatile memory devices
04/18/2007EP1522021B1 Dram supporting different burst-length accesses without changing the burst length setting in the mode register
04/18/2007EP1446840B1 Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
04/18/2007CN1949392A Systems and methods for programming a memory device
04/18/2007CN1949391A Semiconductor memory device having metal-insulator transition film resistor
04/18/2007CN1311554C Data reading-out method of strong dielectric storage device and strong dielectric storage device
04/18/2007CN1311473C Data latch circuit
04/18/2007CN1311472C Magnetoresistive memory and method for reading out from the same
04/18/2007CN1311371C System and method for delaying strobe signal
04/17/2007US7206956 Duty cycle distortion compensation for the data output of a memory device
04/17/2007US7206248 Voltage booster device for semi-conductor components
04/17/2007US7206246 Semiconductor memory device, refresh control method thereof, and test method thereof
04/17/2007US7206243 Method of rewriting a logic state of a memory cell
04/17/2007US7206242 Semiconductor memory
04/17/2007US7206232 Semiconductor device and source voltage control method
04/17/2007US7206230 Use of data latches in cache operations of non-volatile memories
04/17/2007US7206228 Block switch in flash memory device
04/17/2007US7206227 Architecture for assisted-charge memory array
04/17/2007US7206226 Non-volatile memory element having memory gate and control gate adjacent to each other
04/17/2007US7206224 Methods and systems for high write performance in multi-bit flash memory devices
04/17/2007US7206223 MRAM memory with residual write field reset
04/17/2007US7206222 Thin-film magnetic memory device executing data writing with data write magnetic fields in two directions
04/17/2007US7206221 Upside-down magnetoresistive random access memory
04/17/2007US7206220 MRAM-cell and array-architecture with maximum read-out signal and reduced electromagnetic interference
04/17/2007US7206219 Slave and master of serial peripheral interface, system thereof, and method thereof
04/17/2007US7206218 Stable memory cell with improved operation speed
04/17/2007US7206217 Non-volatile flip flop
04/17/2007US7206216 Semiconductor device with a non-erasable memory and/or a nonvolatile memory
04/17/2007US7205682 Internal power supply circuit
04/17/2007US7205633 Capacitor layout orientation
04/17/2007US7205614 High density ROM cell
04/17/2007US7205598 Random access memory device utilizing a vertically oriented select transistor
04/17/2007US7205595 Polymer memory device with electron traps
04/17/2007US7205594 Semiconductor device with capacitor and manufacturing method of the same
04/17/2007US7205590 Semiconductor memory device provided with magneto-resistive element and method for fabricating the same
04/17/2007US7205564 Resistance change memory having organic semiconductor layer
04/17/2007US7205198 Method of making a bi-directional read/program non-volatile floating gate memory cell
04/17/2007US7205163 Curvature anisotropy in magnetic bits for a magnetic random access memory
04/12/2007WO2007040189A1 Magnetic random access memory, and its actuation method
04/12/2007WO2007040167A1 Magnetic random access memory
04/12/2007WO2007039252A1 Memory device having low vpp current consumption
04/12/2007WO2007039087A2 Method and circuitry to generate a reference current for reading a memory cell, and device implementing same
04/12/2007WO2007038971A1 Spin-dependent tunnelling cell and method of formation thereof
04/12/2007WO2006133342A3 Fast magnetic memory devices utilizing spin transfer and magnetic elements used therein
04/12/2007WO2006071686A3 Method and system for reducing soft-writing in a multi-level flash memory
04/12/2007US20070083745 Data processor
04/12/2007US20070081392 Flash memory device and voltage generating circuit for the same
04/12/2007US20070081391 Flash memory device and voltage generating circuit for the same
04/12/2007US20070081390 Systems and methods for programming a memory device
04/12/2007US20070081389 Method and apparatus for systematic and random variation and mismatch compensation for multilevel flash memory operation
04/12/2007US20070081388 Program method of flash memory device
04/12/2007US20070081384 Self-Boosting System for Flash Memory Cells
04/12/2007US20070081383 Bit line selection transistor layout structure