Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
03/2007
03/29/2007US20070070708 Nonvolatile semiconductor memory, fabrication method for the same, semiconductor integrated circuits and systems
03/29/2007US20070070707 Nonvolatile semiconductor memory device
03/29/2007US20070070706 Bit line control circuit for semiconductor memory device
03/29/2007US20070070705 Semiconductor memory device for driving a word line
03/29/2007US20070070704 Nonvolatile memory with program while program verify
03/29/2007US20070070703 Flash memory array system including a top gate memory cell
03/29/2007US20070070702 Nonvolatile semiconductor memory device which stores multi-value information
03/29/2007US20070070701 NAND flash memory device and programming method
03/29/2007US20070070690 Method for using a multi-use memory cell and memory array
03/29/2007US20070070689 Magneto-resistive element
03/29/2007US20070070688 Word Driver and Decode Design Methodology in MRAM Circuit
03/29/2007US20070070687 Adjustable Current Source for an MRAM Circuit
03/29/2007US20070070686 Method and device for performing active field compensation during programming of a magnetoresistive memory device
03/29/2007US20070070685 Atomic probes and media for high density data storage
03/29/2007US20070070684 Dynamic therapy bed system
03/29/2007US20070070683 Random access memory including first and second voltage sources
03/29/2007US20070070682 Storage device and semiconductor device
03/29/2007US20070070681 Memory device comprising an array of resistive memory cells
03/29/2007US20070070680 Electric circuit
03/29/2007US20070070124 Nozzle assembly incorporating a shuttered actuation mechanism
03/29/2007US20070069284 Method and Apparatus for Operating a String of Charge Trapping Memory Cells
03/29/2007US20070069263 Electric switch and memory device using the same
03/29/2007DE4439661C5 Wortleitungstreiberschaltkreis für eine Halbleiterspeichereinrichtung Wordline driver circuit for a semiconductor memory device
03/29/2007DE19846264B4 Speicherzelleneinheit für einen nichtflüchtigen ferroelektrischen Speicher, nichtflüchtiger ferroelektrischer Speicher mit einer Vielzahl dieser Zellen, Wortleitungstreiber für denselben sowie Verfahren zur Herstellung dieser Zellen Memory cell unit for a nonvolatile ferroelectric memory, non-volatile ferroelectric memory having a plurality of these cells, word line drivers for the same, and methods for producing these cells
03/29/2007DE102006043413A1 Hochgeschwindigkeitsschnittstellenschaltung für Halbleiterspeicherchips und ein diese enthaltendes Speichersystem High-speed interface circuit for semiconductor memory chips and a memory system containing these
03/29/2007DE102006043001A1 Memory system with packages, e.g. ball grid array package, has set of conductors that selectively connects one of receiving port contact and transmitting port contact to subset of balls
03/29/2007DE10124278B4 Integrierter Speicher Built-in Memory
03/28/2007EP1590738A4 Distributed memory computing environment and implantation thereof
03/28/2007EP1254460B1 1t flash memory recovery scheme for over-erasure
03/28/2007EP1249021A4 Substrates carrying polymers of linked sandwich coordination compounds and methods of use thereof
03/28/2007CN1938876A An organic electronic device and methods for manufacturing a device of this kind
03/28/2007CN1938874A Spin transfer magnetic element having low saturation magnetization free layers
03/28/2007CN1938787A Rewriteable electronic fuses
03/28/2007CN1938784A Semiconductor nonvolatile storage circuit
03/28/2007CN1938783A Creation of electron traps in metal nitride and metal oxide electrodes in polymer memory devices
03/28/2007CN1938782A Non-volatile memory array with simultaneous write and erase feature
03/28/2007CN1938781A Thin film memory device having a variable resistance
03/28/2007CN1938780A Perpendicular magnetization magnetic element utilizing spin transfer
03/28/2007CN1937424A Method for designing timing control circuit and its circuit
03/28/2007CN1937088A Method for screening sample of system soft mistake
03/28/2007CN1937081A Method of programming of a non-volatile memory cell
03/28/2007CN1937080A NAND FLASH memory device
03/28/2007CN1937078A Multi-operation mode nonvolatile memory
03/28/2007CN1937076A Reduced bitline leakage current
03/28/2007CN1937075A Data transfer operation completion detection circuit and semiconductor memory device provided therewith
03/28/2007CN1937074A Magnetic element and magnetic signal processing apparatus
03/28/2007CN1937069A 半导体装置 Semiconductor device
03/28/2007CN1937068A 半导体装置 Semiconductor device
03/28/2007CN1937067A Reconfigurable input/output in hierarchical memory link
03/28/2007CN1936852A Storage medium reproducing apparatus, storage medium reproducing method for reading information from storage medium
03/28/2007CN1307648C A method for testing a memory array and a memory-based device so testable with a fault response signalizing mode for when finding predetermined correspondence between fault patterns signalizing one su
03/28/2007CN1307647C DRAM, memory, and method for executing read command
03/28/2007CN1307646C Memory device
03/28/2007CN1307645C Ferroelectric memory device and its driving method
03/28/2007CN1307644C Film magnetic memory
03/28/2007CN1307643C Reading method for magnet resistance device with soft reference layer
03/27/2007US7197675 Method and apparatus for determining the write delay time of a memory utilizing the north bridge chipset as in charge of the works for checking the write delay time of the memory
03/27/2007US7197611 Integrated circuit memory device having write latency function
03/27/2007US7197607 Non-volatile memory with concurrent write and read operation to differing banks
03/27/2007US7197596 Computer arrangement using non-refreshed DRAM
03/27/2007US7196966 On die termination mode transfer circuit in semiconductor memory device and its method
03/27/2007US7196964 Selectable memory word line deactivation
03/27/2007US7196962 Packet addressing programmable dual port memory devices and related methods
03/27/2007US7196960 Semiconductor integrated circuit
03/27/2007US7196957 Magnetic memory structure using heater lines to assist in writing operations
03/27/2007US7196956 Semiconductor memory device changing refresh interval depending on temperature
03/27/2007US7196955 Hardmasks for providing thermally assisted switching of magnetic memory elements
03/27/2007US7196953 Semiconductor device using high-speed sense amplifier
03/27/2007US7196945 Semiconductor memory
03/27/2007US7196936 Ballistic injection NROM flash memory
03/27/2007US7196935 Ballistic injection NROM flash memory
03/27/2007US7196932 Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
03/27/2007US7196931 Non-volatile memory and method with reduced source line bias errors
03/27/2007US7196930 Flash memory programming to reduce program disturb
03/27/2007US7196927 Wide dynamic range and high speed voltage mode sensing for a multilevel digital non-volatile memory
03/27/2007US7196926 Vertical capacitor memory cell and its applications
03/27/2007US7196925 Memory array with current limiting device for preventing particle induced latch-up
03/27/2007US7196924 Method of multi-level cell FeRAM
03/27/2007US7196888 Method of fabricating semiconductor integrated circuit device having protection circuit
03/27/2007US7196882 Magnetic tunnel junction device and its method of fabrication
03/27/2007US7196709 Display device and display system using the same
03/27/2007US7196684 Spatial light modulator with charge-pump pixel cell
03/27/2007US7196572 Integrated circuit for stabilizing a voltage
03/27/2007US7196554 Integrated clock supply chip for a memory module, memory module comprising the integrated clock supply chip, and method for operating the memory module under test conditions
03/27/2007US7196540 Impedance matching commonly and independently
03/27/2007US7196424 Semiconductor device
03/27/2007US7196387 Memory cell with an asymmetrical area
03/27/2007US7196386 Memory element and memory device
03/27/2007US7196308 Data line driver capable of generating fixed gradation voltage without switches
03/27/2007US7195976 Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device
03/27/2007US7195929 MRAM including unit cell formed of one transistor and two magnetic tunnel junctions (MTJs) and method for fabricating the same
03/27/2007US7195927 Process for making magnetic memory structures having different-sized memory cell layers
03/27/2007US7195339 Ink jet nozzle assembly with a thermal bend actuator
03/27/2007CA2464082C A ferroelectric or electret memory circuit
03/22/2007WO2007032257A1 Magnetic random access memory waveform shaping circuit
03/22/2007WO2007015474A8 Magnetic memory
03/22/2007US20070065572 Information storage medium with laterally magnetised dot array, and process for producing said medium
03/22/2007US20070064492 Optimizing the speed of an FC-AL switch domain in a data storage network
03/22/2007US20070064491 Radio resource management
03/22/2007US20070064483 Clock synchronized non-volatile memory device