Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/2007
08/09/2007US20070183183 Method and device for controlling a matrix plasma display screen
08/09/2007US20070183182 Differential anti-pinch capacitive sensor
08/09/2007US20070182601 Impedance matching commonly and independently
08/09/2007DE10214102B4 Digitale Begrenzung der Selfrefreshfrequenz für temperaturabhängige Selfrefreshoszillatoren Digital limiting the self-refresh frequency for temperature-dependent self-refresh oscillators
08/09/2007DE102007004713A1 Datenübergabeeinheit zum Übertragen von Daten zwischen unterschiedlichen Taktbereichen Data transfer unit for transferring data between different clock domains
08/09/2007DE102007001783A1 Semiconductor memory device with complementary floating body transistor capacitorless memory cells e.g. dynamic random access memory (DRAM) has voltage sense amplifier provided to amplify voltage differential between complementary bit lines
08/09/2007DE102006004851A1 Integrierter Halbleiterspeicher mit Erzeugung von Spannungen Integrated semiconductor memory with generating voltages
08/09/2007DE102006004409A1 SRAM-Zelle mit selbststabilisierenden Transistorstrukturen SRAM cell with self-stabilizing transistor structures
08/09/2007DE10101630B4 Halbleiterspeicherbauelement mit Eingabe-/Ausgabeleitungsstruktur Semiconductor memory device with input / output line structure
08/08/2007EP1816570A2 Integrated circuit I/O using a high performance bus interface
08/08/2007EP1816569A2 Integrated circuit I/O using a high performance bus interface
08/08/2007EP1815480A2 Method and system for regulating a program voltage value during multilevel memory device programming
08/08/2007EP1815479A1 Method and system for minimizing impact of refresh operations on volatile memory performance
08/08/2007EP1714288A4 Secured phase-change devices
08/08/2007EP1700310A4 A memory device, an information storage process, a process, and a structured material
08/08/2007EP1588372B1 Mram architecture with a grounded write bit line and electrically isolated read bit line
08/08/2007CN1331232C Capacitance element and mfg method thereof
08/08/2007CN1331229C Semiconductor integrated circuit
08/08/2007CN1331207C Method for evaluating semiconductor device error and system for supporting the same
08/08/2007CN1331157C Semiconductor storage device with testing and redundant function
08/08/2007CN1331156C Semiconductor storage device
08/08/2007CN1331155C Memory device reading data according to difference in electrical resistance between selected memory cell and reference cell
08/08/2007CN1331154C Method and structure for maximizing SN ratio of electric resistance array
08/08/2007CN101015060A Shield plate for limiting cross coupling between floating gates
08/08/2007CN101015023A Cross-point ferroelectric memory that reduces the effects of bit line to word line shorts
08/08/2007CN101015022A Dll circuit
08/08/2007CN101015019A Apparatus and method for selectively configuring a memory device using a bi-stable relay
08/08/2007CN101013741A Organic memory devices and methods of fabricating such devices
08/08/2007CN101013738A Vertical side wall active pin structures in a phase change memory and manufacturing methods
08/08/2007CN101013737A Thermally insulated phase change memory device and manufacturing method
08/08/2007CN101013736A A pipe shaped phase change memory
08/08/2007CN101013597A Resistance random access memory and methods of storage operating same
08/07/2007US7254737 Data processing system and image processing system
08/07/2007US7254680 Semiconductor integrated circuit and data processing system
08/07/2007US7254082 Semiconductor device
08/07/2007US7254081 Semiconductor memory device
08/07/2007US7254077 Circuit and method for high speed sensing
08/07/2007US7254073 Memory device having an array of resistive memory cells
08/07/2007US7254072 Semiconductor memory device having hierarchically structured data lines and precharging means
08/07/2007US7254070 Semiconductor memory device with redundancy circuit
08/07/2007US7254068 Semiconductor memory device
08/07/2007US7254066 Memory device with different termination units for different signal frequencies
08/07/2007US7254064 Flash memory device having multi-level cell and reading and programming method thereof
08/07/2007US7254063 Non-volatile semiconductor memory device and method for reading the same
08/07/2007US7254062 Circuit for selecting/deselecting a bitline of a non-volatile memory
08/07/2007US7254060 Nonvolatile semiconductor memory device
08/07/2007US7254059 Multilevel phase-change memory element and operating method
08/07/2007US7254058 Thin film magnetic memory device provided with program element
08/07/2007US7254057 Magnetic thin-film memory device for quick and stable reading data
08/07/2007US7254056 Apparatus for optically pre-programming electrically-programmable phase-change memory devices
08/07/2007US7254055 Initial firing method and phase change memory device for performing firing effectively
08/07/2007US7254054 Magnetic random access memory and method for manufacturing the same
08/07/2007US7254053 Active programming and operation of a memory device
08/07/2007US7254051 Semiconductor memory device and various systems mounting them
08/07/2007US7254050 Method of making adaptive negative differential resistance device
08/07/2007US7253676 Semiconductor device and driving method of semiconductor device
08/07/2007US7253464 Junction-isolated depletion mode ferroelectric memory devices and systems
08/07/2007US7253457 Semiconductor device with external terminals arranged symmetrically with respect to a normal external terminal arrangement
08/07/2007US7253429 Electrically programmable memory element
08/07/2007US7253051 Semiconductor integrated circuit device and process for manufacturing the same
08/07/2007US7253009 Method of producing an integrated circuit arrangement with field-shaping electrical conductor
08/07/2007US7252373 System for aligning a charge tunnel of an ink jet printer
08/07/2007US7252367 Inkjet printhead having paddled inkjet nozzles
08/07/2007US7252366 Inkjet printhead with high nozzle area density
08/02/2007WO2007086050A2 Device having an array of non-volatile memory cells and a method for altering a state of a non-volatile memory cell
08/02/2007WO2007036860A3 Nanowire magnetic random access memory
08/02/2007WO2005098863A3 Method and apparatus achieving memory and transmission overhead reductions in a content routing network
08/02/2007WO2004075171A3 Data recording using carbon nanotube electron sources
08/02/2007US20070180264 Hard Drive with Metal Casing and Ground Pin Standoff to Reduce ESD Damage to Stacked PCBA's
08/02/2007US20070178643 Memory utilizing oxide-conductor nanolaminates
08/02/2007US20070177445 Semiconductor device
08/02/2007US20070177430 Data transfer apparatus, information recording and reproducing apparatus, and data transfer method
08/02/2007US20070177429 Nonvolatile semiconductor memory and nonvolatile memory system using thereof
08/02/2007US20070177428 Memory circuit arrangement and method for reading and/or verifying the status of memory cells of a memory cell array
08/02/2007US20070177422 Capacitor boost sensing
08/02/2007US20070177421 Magnetoresistance effect element and magnetic memory
08/02/2007US20070177420 Magnetic random access memory with selective toggle memory cells
08/02/2007US20070177419 Asymmetric four-transistor sram cell
08/02/2007US20070177418 Nanoelectromechanical memory cells and data storage devices
08/02/2007US20070177417 High-speed capacitor leakage measurement systems and methods
08/02/2007DE102004001577B4 Halbleiter-Speicherschaltung und Verfahren zum Betreiben derselben in einem Bereitschaftsmodus A semiconductor memory circuit and method of operating same in a standby mode
08/01/2007EP1814122A1 Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory in multiple-data states
08/01/2007EP1814120A1 Magnetic memory unit using magnetic domain dragging and method of operating the same
08/01/2007EP1743339A4 Silicon on insulator read-write non-volatile memory comprising lateral thyristor and trapping layer
08/01/2007EP1647029B1 Temperature sensor scheme
08/01/2007EP1563510B1 2t2c signal margin test mode using a defined charge exchange between bl and /bl
08/01/2007EP1514275B1 Ferroelectric memory with series connected memory cells
08/01/2007EP1509923B1 Ferroelectric memory integrated circuit with improved reliability and density
08/01/2007EP1428151A4 System and method for implementing journaling in a multi-node environment
08/01/2007CN1329998C Memory cell arrangement
08/01/2007CN1329993C Semiconductor device and fabrication method thereof
08/01/2007CN1329992C Memory device and its manufacturing method
08/01/2007CN1329976C Magnetoelectronics device and method for fabricating the same
08/01/2007CN1329925C Semiconductor device
08/01/2007CN1329922C Semiconductor memory device
08/01/2007CN1329921C Semiconductor memory and method for entering its operation mode
08/01/2007CN1329920C A method for non-destructive readout and apparatus for use with the method
08/01/2007CN1329919C Thin film magnetic memory with high precision data read
08/01/2007CN1329918C Thin film magnetic memory of shortened data reading data line charging time
08/01/2007CN1329917C Magnetic storage device
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