Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/2008
12/25/2008US20080316804 Multiple level cell phase-change memory devices having controlled resistance drift parameter, memory systems employing such devices and methods of reading memory devices
12/25/2008US20080316802 Memory device having drift compensated read operation and associated method
12/25/2008US20080316801 Magnetic Memory System Using Mram-Sensor
12/25/2008US20080316800 Semiconductor memory device
12/25/2008US20080316799 Read-Preferred SRAM Cell Design
12/25/2008US20080316798 Nonvolatile semiconductor memory device
12/25/2008US20080316797 Memory Element Array
12/25/2008US20080316796 Method of making high forward current diodes for reverse write 3D cell
12/25/2008US20080316795 Method of making nonvolatile memory device containing carbon or nitrogen doped diode
12/25/2008US20080316794 Integrated circuit having multilayer electrode
12/25/2008US20080316793 Integrated circuit including contact contacting bottom and sidewall of electrode
12/25/2008US20080316792 Circuit for programming a memory element
12/24/2008WO2008157000A1 Delta sigma sense amplifier comprising digital filters and memory
12/24/2008WO2008156967A1 Method and system for providing a spin transfer device with improved switching characteristics
12/24/2008WO2007100626A3 Current driven memory cells having enhanced current and enhanced current symmetry
12/24/2008EP2005436A2 Methods for erasing and programming memory devices
12/24/2008EP1889261A4 Fast magnetic memory devices utilizing spin transfer and magnetic elements used therein
12/24/2008EP1665282B1 Erase inhibit in non-volatile memories
12/24/2008EP1665275A4 Method and apparatus for read bitline clamping for gain cell dram devices
12/24/2008DE102008029133A1 Speicheransteuerverfahren und Halbleiterspeichereinrichtung Speicheransteuerverfahren and semiconductor memory device
12/24/2008DE10058231B4 Datensynchronisationsschaltung und diese enthaltendes Mehrfachbank-Speicherbauelement Data synchronization circuit and these containing multiple bank memory device
12/24/2008CN101331552A Memory system for reducing current consumption and method thereof
12/24/2008CN101330128A Organic non-volatile memory material and memory device
12/24/2008CN101330126A Phase variation storage unit structure and method for manufacturing the same
12/24/2008CN101330093A Memory element array
12/24/2008CN101330092A Phase-changing storage device and manufacture method thereof
12/24/2008CN101330091A Phase-changing storage device and manufacture method thereof
12/24/2008CN101330086A Noise suppression for open bit line DRAM architectures
12/24/2008CN101329910A Phase change memory device
12/24/2008CN101329909A System and method for improving programming speed of phase-change memory
12/24/2008CN101329908A Phase-change memory for high speed complementation unit
12/24/2008CN101329907A System and method for reducing programming power consumption of phase-change memory
12/24/2008CN101329906A Non-volatile sequent modular memory, data storage and reading method
12/24/2008CN101329905A Novel non-volatilization dynamic memory and memory operation method thereof
12/24/2008CN101329904A Noise suppression for open bit line DRAM architectures
12/24/2008CN101329903A Semiconductor memory device and method for operating semiconductor memory device
12/24/2008CN101329902A Semiconductor memory device and method for operating semiconductor memory device
12/24/2008CN101329901A Bit element line sensing amplifier containing data line bit element switching transmission transistor
12/24/2008CN101329900A Method for controlling dynamic RAM
12/24/2008CN101329899A Semiconductor device that uses a plurality of source voltages
12/24/2008CN101329898A Memory driving method and semiconductor storage device
12/24/2008CN101329897A Method of programming a magnetic memory element
12/24/2008CN100446253C Semiconductor device, nonvolatile storage unit and operation method thereof
12/24/2008CN100446128C ROM circuit capable of debugging and updating and method of debugging and updating
12/24/2008CN100446126C Flash memory access using a plurality of command cycles
12/24/2008CN100446125C Nonvolatile storage unit in high speed
12/24/2008CN100446124C Method for detecting information gating signal
12/24/2008CN100446123C Semiconductor storage device
12/24/2008CN100446122C Semiconductor memory having self updating for reducing power consumption
12/24/2008CN100446121C Semiconductor memory and its mfg. method
12/24/2008CN100446120C Delay locking loop having acceleration mode and controlled by register
12/24/2008CN100446119C Strong dielectric memory and electronic apparatus
12/24/2008CN100446118C Semiconductor memory
12/24/2008CN100446117C Magnetic storage device
12/24/2008CN100446116C Method and apparatus for setting and compensating read latency in a high speed DRAM
12/23/2008US7468921 Method for increasing programming speed for non-volatile memory by applying direct-transitioning waveforms to word lines
12/23/2008US7468920 Applying adaptive body bias to non-volatile storage
12/23/2008US7468917 Nonvolatile semiconductor memory device and method of writing data into the same
12/23/2008US7468916 Non-volatile memory having a row driving circuit with shared level shift circuits
12/23/2008US7468915 Method of reducing disturbs in non-volatile memory
12/23/2008US7468914 Semiconductor memory device and data write method thereof
12/23/2008US7468912 Multi-level-cell programming methods of non-volatile memories
12/23/2008US7468909 Semiconductor device and method of controlling the same
12/23/2008US7468908 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell
12/23/2008US7468906 Word driver and decode design methodology in MRAM circuit
12/23/2008US7468905 Magnetic field shaping conductor
12/23/2008US7468904 Apparatus for hardening a static random access memory cell from single event upsets
12/23/2008US7468903 Circuits for improving read and write margins in multi-port SRAMS
12/23/2008US7468902 SRAM device with a low operation voltage
12/23/2008US7468900 Semiconductor memory device having a bitline amplified to a positive voltage and a negative voltage
12/23/2008US7468139 Method of depositing heater material over a photoresist scaffold
12/18/2008WO2008154519A1 Method and system for providing a magnetic element and magnetic memory being unidirectional writing enabled
12/18/2008WO2008154253A1 Semiconductor device and method comprising a high voltage reset driver and an isolated memory array
12/18/2008WO2008154229A1 Non-volatile memory and method for improved sensing having bit-line lockout control
12/18/2008WO2008152724A1 Semiconductor storage device
12/18/2008WO2008151429A1 Anti-fuse memory cell
12/18/2008WO2008100868A3 Non-uniform switching based non-volatile magnetic based memory
12/18/2008US20080310237 CMOS Compatible Single-Poly Non-Volatile Memory
12/18/2008US20080310236 Subtraction circuits and digital-to-analog converters for semiconductor devices
12/18/2008US20080310235 Sensing circuit for memories
12/18/2008US20080310231 Optimization of critical dimensions and pitch of patterned features in and above a substrate
12/18/2008US20080310228 Memory with correlated resistance
12/18/2008US20080310221 Reference current sources
12/18/2008US20080310220 3-d sram array to improve stability and performance
12/18/2008US20080310219 Method and system for providing a magnetic element and magnetic memory being unidirectional writing enabled
12/18/2008US20080310218 Semiconductor memory device and its data reading method
12/18/2008US20080310217 Writing circuit for a phase change memory
12/18/2008US20080310216 Memory element utilizing magnetization switching caused by spin accumulation and spin RAM device using the memory element
12/18/2008US20080310215 Magnetic random access memory and write method of the same
12/18/2008US20080310214 Device and method of programming a magnetic memory element
12/18/2008US20080310213 Method and system for providing spin transfer tunneling magnetic memories utilizing non-planar transistors
12/18/2008US20080310212 Sram with asymmetrical pass gates
12/18/2008US20080310211 Resistance change memory device
12/18/2008US20080310209 Circuit, biasing scheme and fabrication method for diode accesed cross-point resistive memory array
12/18/2008US20080310208 Process for erasing chalcogenide variable resistance memory bits
12/18/2008US20080309841 Active matrix substrate and display device
12/18/2008US20080309746 Printing system with a data capture device
12/18/2008US20080309726 Printhead integrated circuit with ink supply channel feeding a plurality of nozzle rows
12/18/2008US20080309725 Inkjet printhead with filter structure at inlet to ink chambers
12/18/2008US20080309540 Integrators for delta-sigma modulators
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