| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 07/16/2009 | US20090180313 Chalcogenide anti-fuse |
| 07/16/2009 | US20090180312 Unidirectional-Current Magnetization-Reversal Magnetoresistance Element and Magnetic Recording Apparatus |
| 07/16/2009 | US20090180311 Core-Rotating Element of Ferromagnetic Dot and Information Memory Element Using the Core of Ferromagnetic Dot |
| 07/16/2009 | US20090180310 Resistance change type memory |
| 07/16/2009 | US20090180309 Memory Cells, Memory Cell Programming Methods, Memory Cell Reading Methods, Memory Cell Operating Methods, and Memory Devices |
| 07/16/2009 | US20090180308 Method of using spin injection device |
| 07/16/2009 | US20090179693 Semiconductor device |
| 07/16/2009 | US20090179692 Semiconductor integrated circuit device operating with low power consumption |
| 07/16/2009 | CA2711671A1 System and method of selectively applying negative voltage to wordlines during memory device read operation |
| 07/15/2009 | EP2078303A1 Reading of a nonvolatile memory cell by taking account of the stored state of a neighboring memory cell |
| 07/15/2009 | CN101484947A Maintenance operations for multi-level data storage cells |
| 07/15/2009 | CN101483064A Method for adaptive detecting configuration by SDRAM |
| 07/15/2009 | CN101483063A Semiconductor memory device and method for fabricating the same |
| 07/15/2009 | CN101483062A Resistance change type memory |
| 07/15/2009 | CN100514695C Programmable structure of micro-electronics |
| 07/15/2009 | CN100514492C Device and method for pulse width control in a phase change memory device |
| 07/15/2009 | CN100514491C Dual port sram cell |
| 07/15/2009 | CN100514490C Storage device and method for amplifying voltage level of bit line and complementary bit line |
| 07/15/2009 | CN100514489C Memory devices having bit line precharge circuits and associated bit line precharge methods |
| 07/15/2009 | CN100514488C Off chip DRAM data sampling method with configurable sample-taking point |
| 07/15/2009 | CN100514487C Magnetoelectronics information device having a compound magnetic free layer |
| 07/15/2009 | CN100514400C Flip-flops, shift registers, and active-matrix display devices |
| 07/15/2009 | CN100514317C Signal transmitting device suitable for fast signal transmission |
| 07/15/2009 | CN100513182C Replaceable memory device for a consumable substance container |
| 07/14/2009 | US7562269 Semiconductor storage device |
| 07/14/2009 | US7562256 Semiconductor memory device for build-in fault diagnosis |
| 07/14/2009 | US7561480 Ground biased bitline register file |
| 07/14/2009 | US7561477 Data strobe synchronization circuit and method for double data rate, multi-bit writes |
| 07/14/2009 | US7561474 Program verifying method and programming method of flash memory device |
| 07/14/2009 | US7561473 System for performing data pattern sensitivity compensation using different voltage |
| 07/14/2009 | US7561468 Non-volatile semiconductor memory device and method of writing data in non-volatile semiconductor memory devices |
| 07/14/2009 | US7561467 Flash memory device using program data cache and programming method thereof |
| 07/14/2009 | US7561463 Thin film phase-change memory |
| 07/14/2009 | US7561462 Circuit and method for a high speed dynamic RAM |
| 07/14/2009 | US7561461 Non-volatile semiconductor memory device |
| 07/14/2009 | US7561460 Resistive memory arrangement |
| 07/14/2009 | US7561459 Semiconductor memory device |
| 07/14/2009 | US7561458 Ferroelectric memory array for implementing a zero cancellation scheme to reduce plateline voltage in ferroelectric memory |
| 07/14/2009 | US7561385 Magneto-resistive element in which a free layer includes ferromagnetic layers and a non-magnetic layer interposed therebetween |
| 07/14/2009 | US7560975 Semiconductor device |
| 07/14/2009 | US7560760 Ferroelectric memory devices having expanded plate lines |
| 07/14/2009 | US7560724 Storage device with reversible resistance change elements |
| 07/14/2009 | US7560339 Nonvolatile memory cell comprising a reduced height vertical diode |
| 07/14/2009 | US7560269 analysis apparatus comprising electrode layouts on nonconducting substrates, impedance analyzers and software programs, used for analyzing cells; screening compounds that effect immunoglobulin mediated responses of cells to antigens |
| 07/14/2009 | US7559472 User interface for an image transformation device |
| 07/09/2009 | WO2009085079A1 Method of programming cross-point diode memory array |
| 07/09/2009 | WO2009085075A1 Two terminal nonvolatile memory using gate controlled diode elements |
| 07/09/2009 | US20090175103 Semiconductor memory asynchronous pipeline |
| 07/09/2009 | US20090175085 Non-volatile semiconductor memory device and method of writing and reading the same |
| 07/09/2009 | US20090175082 Flash EEprom System With Simultaneous Multiple Data Sector Programming and Storage of Physical Block Characteristics in Other Designated Blocks |
| 07/09/2009 | US20090175080 Flash EEprom System With Simultaneous Multiple Data Sector Programming and Storage of Physical Block Characteristics in Other Designated Blocks |
| 07/09/2009 | US20090175073 Nanostructure-Based Memory |
| 07/09/2009 | US20090175072 Phase-change random access memory devices and related methods of operation |
| 07/09/2009 | US20090175071 Phase change memory dynamic resistance test and manufacturing methods |
| 07/09/2009 | US20090175070 Dual node access storage cell having buffer circuits |
| 07/09/2009 | US20090175069 Storage cell having buffer circuit for driving the bitline |
| 07/09/2009 | US20090175068 Sram device, and sram device design structure, with adaptable access transistors |
| 07/09/2009 | US20090175067 Sram employing a read-enabling capacitance |
| 07/09/2009 | US20090175066 High-speed DRAM including hierarchical read circuits |
| 07/09/2009 | US20090175065 Semiconductor memory device and method for fabricating the same |
| 07/09/2009 | US20090175064 Semiconductor memory device with reduced coupling noise |
| 07/09/2009 | DE10354535B4 Chipintegrierte Abschlussschaltung, zugehörige Speicheranordnung und zugehöriges Abschlussverfahren Integrated chip termination circuit associated memory device and associated method statements |
| 07/09/2009 | DE10334531B4 Speichermodul und Speichersystem, geeignet für einen Hochgeschwindigkeitsbetrieb Memory module and storage system suitable for a high speed operation |
| 07/09/2009 | DE102008003385A1 Flip-flop circuit i.e. latch, for e.g. electronic component, has transmission circuit designed to couple signal and control signal strongly at node and to couple signal weakly at node without control signal or to decouple signal from node |
| 07/09/2009 | DE102004030591B4 Magnetischer Speicher, der Veränderungen zwischen einem ersten und einem zweiten Widerstandszustand einer Speicherzelle erfasst Detected magnetic memory that changes between a first and a second resistance state of a memory cell |
| 07/08/2009 | EP2077558A1 Predictive timing calibration for memory devices |
| 07/08/2009 | EP2076905A2 Concurrent reading of status registers |
| 07/08/2009 | EP2076904A2 Dynamic word line drivers and decoders for memory arrays |
| 07/08/2009 | EP1955333A4 Semiconductor integrated circuit having low power consumption with self-refresh |
| 07/08/2009 | CN101477833A Clock controlled asynchronous FIFO memory |
| 07/08/2009 | CN101477832A Solid hard disc, recognition method thereof, monitoring method and system therefor |
| 07/08/2009 | CN101477830A Multiport memory based on dynamic random access memory core |
| 07/08/2009 | CN101477829A Multiport memory based on dynamic random access memory core |
| 07/08/2009 | CN100511696C Stacked 1T-nmemory cell structure |
| 07/08/2009 | CN100511643C Method for making self-alignment crossover point storage array |
| 07/08/2009 | CN100511477C Static random access memory device |
| 07/08/2009 | CN100511476C Static random access memory and operation method |
| 07/08/2009 | CN100511475C Semiconductor memory module |
| 07/08/2009 | CN100511474C Noise suppression for open bit line DRAM architectures |
| 07/08/2009 | CN100511473C Storage devices and semiconductor devices |
| 07/08/2009 | CN100511472C 半导体存储器件 The semiconductor memory device |
| 07/08/2009 | CN100511471C Ferroelectric random access memory device, display drive integrated circuit and electronic apparatus |
| 07/08/2009 | CN100511085C Computer arrangement using non-refreshed dynamic random access memory |
| 07/07/2009 | US7558145 Word line control for improving read and write margins |
| 07/07/2009 | US7558132 Implementing calibration of DQS sampling during synchronous DRAM reads |
| 07/07/2009 | US7558127 Data output circuit and method in DDR synchronous semiconductor device |
| 07/07/2009 | US7558126 Nonvolatile semiconductor memory device |
| 07/07/2009 | US7558122 Flash memory device and method of erasing flash memory device |
| 07/07/2009 | US7558121 Flash memory device and smart card including the same |
| 07/07/2009 | US7558115 Program method of flash memory device |
| 07/07/2009 | US7558108 3-bit NROM flash and method of operating same |
| 07/07/2009 | US7558107 Non volatile memory |
| 07/07/2009 | US7558106 Thin film magnetic memory device writing data with bidirectional current |
| 07/07/2009 | US7558105 Phase change memory devices and multi-bit operating methods for the same |
| 07/07/2009 | US7558104 Power saving in memory arrays |
| 07/07/2009 | US7558103 Magnetic switching element and signal processing device using the same |
| 07/07/2009 | US7558102 Device and method having a memory array storing each bit in multiple memory cells |
| 07/07/2009 | US7558101 Scan sensing method that improves sensing margins |
| 07/07/2009 | US7558100 Phase change memory devices including memory cells having different phase change materials and related methods and systems |
| 07/07/2009 | US7558099 Method of controlling the resistance in a variable resistive element and non-volatile semiconductor memory device |