Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/2009
08/27/2009US20090212273 Semiconductor Devices Having Resistive Memory Elements
08/27/2009DE19820465B4 Magnetowiderstandseffektelement, und ein derartiges Element aufweisender Magnetkopf und magnetische Aufzeichnungseinrichtung A magnetoresistance effect element, and such an element having Direction magnetic head and magnetic recording means
08/27/2009DE10349466B4 Taktsignal-Synchronisations-Vorrichtung, sowie Taktsignal-Synchronisationsverfahren Clock synchronization device, and clock signal synchronization method
08/27/2009DE102008008519A1 Method for providing data in multiple dynamic random access memory storage modules, involves transferring refreshing commands of central instance at dynamic random access memory storage modules
08/27/2009DE102006024096B4 Verzögerungsregelkreis Delay locked loop
08/27/2009DE102005013531B4 Vorrichtung zur Ermittlung von Taktabweichungen unter Verwendung einer synchronen Spiegelverzögerungsschaltung (Synchronous Mirror Delay Circuit) Apparatus for determination of clock skew using a synchronous mirror delay circuit (Synchronous Mirror Delay Circuit)
08/27/2009DE10146825B4 Programmierbare Impedanzsteuerschaltung Programmable impedance control circuit
08/26/2009EP2092527A1 Memory device with configurable delay tracking
08/26/2009EP1943651A4 Dynamic random access memory device and method for self-refreshing memory cells
08/26/2009EP1854102B1 Multiple level programming in a non-volatile memory device
08/26/2009EP1642297B1 Data strobe synchronization circuit and method for double data rate, multi-bit writes
08/26/2009CN101515630A Resistance-type memory element and method for forming same
08/26/2009CN101515566A Method for forming integrated circuit
08/26/2009CN101515474A Semiconductor device including resistance storage element
08/26/2009CN101515473A Memory circuit
08/26/2009CN101515472A Method for accessing memory chip
08/26/2009CN100533756C Phase change memory fabricated using self-aligned processing and its manufacture method
08/26/2009CN100533672C A method of improving surface planarity prior to MRAM bit material deposition
08/26/2009CN100533596C Semiconductor device
08/26/2009CN100533594C Multiport memory
08/26/2009CN100533593C Semiconductor device and testing method for same
08/26/2009CN100533592C Semiconductor memory device
08/26/2009CN100533591C Current limit circuit and semiconductor memory device
08/26/2009CN100533590C Ferroelectric memory
08/26/2009CN100533589C Magnetic unit and memory
08/26/2009CN100533405C Address volume connection function for addressable storage equipment
08/25/2009US7581121 System for a memory device having a power down mode and method
08/25/2009US7580320 Multi-port memory device
08/25/2009US7580308 Semiconductor memory device and refresh method for the same
08/25/2009US7580303 Semiconductor memory having a precharge voltage generation circuit for reducing power consumption
08/25/2009US7580287 Program and read trim setting
08/25/2009US7580286 Selective threshold voltage verification and compaction
08/25/2009US7580285 Semiconductor memory device using only single-channel transistor to apply voltage to selected word line
08/25/2009US7580284 Flash memory devices and methods of programming the same by overlapping programming operations for multiple mats
08/25/2009US7580283 System and memory for sequential multi-plane page memory operations
08/25/2009US7580281 Flash memory device with write protection
08/25/2009US7580278 Variable resistance memory device
08/25/2009US7580277 Memory device including a programmable resistance element
08/25/2009US7580276 Nonvolatile memory element
08/25/2009US7580275 Control of a memory matrix with resistance hysteresis elements
08/25/2009US7580068 Image data manipulation system
08/25/2009US7579904 Semiconductor memory device
08/25/2009US7579611 Nonvolatile memory cell comprising a chalcogenide and a transition metal oxide
08/25/2009US7579247 Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
08/25/2009US7579241 Semiconductor device and method of manufacture thereof
08/25/2009US7578582 Inkjet nozzle chamber holding two fluids
08/20/2009WO2009102802A2 Magnetic domain patterning using plasma ion implantation
08/20/2009WO2009101568A1 An integrated circuit with a memory matrix with a delay monitoring column
08/20/2009WO2009076511A3 Memory device with self-refresh operations
08/20/2009US20090209051 NONVOLATILE FERROELECTRIC PERPENDICULAR ELECTRODE CELL, FeRAM HAVING THE CELL AND METHOD FOR MANUFACTURING THE CELL
08/20/2009US20090207682 Semiconductor memory device
08/20/2009US20090207655 Multiple time programmable (mtp) pmos floating gate-based non-volatile memory device for a general purpose cmos technology with thick gate oxide
08/20/2009US20090207654 Semiconductor device including plurality of parallel input/output lines and methods of fabricating and using the same
08/20/2009US20090207653 Memory storage device with heating element
08/20/2009US20090207652 Semiconductor device including resistance storage element
08/20/2009US20090207651 Method for switching magnetic random access memory elements and magnetic element structures
08/20/2009US20090207650 System and method for integrating dynamic leakage reduction with write-assisted sram architecture
08/20/2009US20090207649 Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array
08/20/2009US20090207648 Multi-level dynamic memory device
08/20/2009US20090207647 Nonvolatile semiconductor storage device and data writing method therefor
08/20/2009US20090207646 Integrated circuit with resistive memory cells and method for manufacturing same
08/20/2009US20090207645 Method and apparatus for accessing a bidirectional memory
08/20/2009US20090207642 Semiconductor signal processing device
08/20/2009US20090207255 Camera Sensing Device For Capturing And Manipulating Images
08/20/2009DE19742162B4 Taktsignal-Steuervorrichtung für Datenausgabepuffer Clock signal control device for data output buffer
08/20/2009DE10345116B4 Bitleitungsausgleichssystem für eine integrierte DRAM-Schaltung Bitleitungsausgleichssystem for a DRAM integrated circuit
08/20/2009DE102004039978B4 Magnetisches Tunnelübergangsbauelement und dieses enthaltende MRAM-Zelle Magnetic tunnel junction device and containing it MRAM cell
08/19/2009EP2089888A2 Electronic devices based on current induced magnetization dynamics in single magnetic layers
08/19/2009EP2008282A4 Programmable cell
08/19/2009EP1476812A4 Pipelined parallel programming operation in a non-volatile memory system
08/19/2009CN101512667A Compensating for coupling during programming
08/19/2009CN101512662A Compensating for coupling based on sensing a neighbor using coupling
08/19/2009CN101512661A Combined distortion estimation and error correction coding for memory devices
08/19/2009CN100530972C Jitter suppressing delay locked loop circuits and related methods
08/19/2009CN100530971C Delay locked loop and semiconductor memory device having the same
08/19/2009CN100530968C Time-delay locking loop circuit for internally correcting dutyratio and method for correcting duty cycle thereof
08/19/2009CN100530739C Phase change memory unit with loop phase change material and its making method
08/19/2009CN100530738C Phase-change memory cell structure and fabrication method thereof
08/19/2009CN100530658C Semiconductor memory device and magnetic RAM device
08/19/2009CN100530656C Semiconductor device and methods of arranging and manufacturing same
08/19/2009CN100530440C Semiconductor device
08/19/2009CN100530439C Reduced power magnetoresistive random access memory elements
08/19/2009CN100530429C Memory cell structure of SRAM
08/19/2009CN100530428C Integrated circuit device including at least one input buffer
08/19/2009CN100530427C Intergrated circuit device comprising input/output wire pair and precharging circuit
08/19/2009CN100530426C Semiconductor memory device and a refresh clock signal generator thereof
08/19/2009CN100530425C Semiconductor memory device including memory cell without capacitor
08/19/2009CN100530424C Dynamic random memory and its access method
08/19/2009CN100530423C Memory device
08/19/2009CN100530422C Semiconductor integrated circuit
08/19/2009CN100530421C Ferroelectric storage device with board wire control circuit and operating method thereof
08/19/2009CN100530420C Non-volatile passive matrix and method for read out of the same
08/19/2009CN100530419C Cladding material on conductive lines of MRAM
08/19/2009CN100530418C Multi-port memory based on DRAM core
08/19/2009CN100530417C Multi-port memory based on DRAM core
08/19/2009CN100530415C Method and memory system having mode selection between dual data strobe mode and single data strobe mode with inversion
08/19/2009CN100530414C Method and device for multibank memory scheduling
08/19/2009CN100530412C Inner storage voltage supply circuit with protecting circuit
08/18/2009US7577884 Memory circuit testing system, semiconductor device, and memory testing method
08/18/2009US7577882 Semiconductor integrated circuit including memory macro
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