Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
06/2009
06/18/2009US20090154218 Memory arrays using nanotube articles with reprogrammable resistance
06/18/2009US20090154217 High speed otp sensing scheme
06/18/2009US20090154216 Semiconductor memory device and semiconductor device group
06/18/2009US20090153619 Inkjet nozzle arrangement
06/18/2009DE112006004002T5 NBTI-resistente Speicherzellen mit Nand-Gliedern NBTI-resistant memory cells with NAND gates
06/18/2009DE102004015555B4 Magnetischer Direktzugriffsspeicher The magnetic random access memory
06/17/2009EP2070090A1 Pseudo random and command driven bit compensation for the cycling effects in flash memory and methods therefor
06/17/2009EP2070089A2 System and method for providing content-addressable magnetoresistive random access memory cells
06/17/2009EP2070088A2 Nonvolatile resistive memories, latch circuits, and operation circuits having scalable two-terminal nanotube switches
06/17/2009EP1908076A4 Non-volatile content addressable memory using phase-change-material memory elements
06/17/2009CN101461009A Array source line (AVSS) controlled high voltage regulation for programming flash or EE array
06/17/2009CN101458959A Data programming circuit and memory programming method
06/17/2009CN100501876C Memory and method for soft defect detection in a memory
06/17/2009CN100501866C Device for opening character line decoder by balance of reference line
06/17/2009CN100501865C 磁存储器 Magnetic memory
06/16/2009US7549068 Data processing apparatus and method for operating a dual rail circuit component in a security mode and power saving mode
06/16/2009US7548477 Method and apparatus for adapting circuit components of a memory module to changing operating conditions
06/16/2009US7548468 Semiconductor memory and operation method for same
06/16/2009US7548464 Method for setting programming start bias for flash memory device and programming method using the same
06/16/2009US7548461 Soft errors handling in EEPROM devices
06/16/2009US7548460 Floating-gate semiconductor structures
06/16/2009US7548459 Method, apparatus, and system providing adjustable memory page configuration
06/16/2009US7548458 Methods of biasing a multi-level-cell memory
06/16/2009US7548457 Multi-bit nonvolatile memory device and related programming method
06/16/2009US7548456 Combo memory cell
06/16/2009US7548455 Multi-valued logic/memory cells and methods thereof
06/16/2009US7548454 Memory array with readout isolation
06/16/2009US7548453 Memory array with readout isolation
06/16/2009US7548452 MRAM read bit with askew fixed layer
06/16/2009US7548451 Phase change random access memory
06/16/2009US7548450 Magnetic memory device, method for writing magnetic memory device and method for reading magnetic memory device
06/16/2009US7548449 Magnetic memory device and methods thereof
06/16/2009US7548448 Integrated circuit having a switch
06/16/2009US7548447 Semiconductor memory device and methods thereof
06/16/2009US7548446 Phase change memory device and associated wordline driving circuit
06/16/2009US7548445 Over-driven access method and device for ferroelectric memory
06/16/2009US7547934 Magneto-resistive effect element and magnetic memory
06/11/2009WO2009073331A1 Bank sharing and refresh in a shared multi-port memory device
06/11/2009WO2009073074A1 Magnetic memory device having a c-shaped structure and method of manufacturing the same
06/11/2009WO2009072511A1 Non-volatile latch circuit
06/11/2009WO2009052371A3 Ground level precharge bit line scheme for read operation in spin transfer torque magnetoresistive random access memory
06/11/2009WO2007053517A3 Enhanced toggle-mram memory device
06/11/2009WO2003046918A3 High performance semiconductor memory devices
06/11/2009US20090150604 Semiconductor Device
06/11/2009US20090150595 Balanced programming rate for memory cells
06/11/2009US20090147609 Techniques for configuring memory systems using accurate operating parameters
06/11/2009US20090147607 Random access memory and data refreshing method thereof
06/11/2009US20090147606 Memory refresh method and apparatus
06/11/2009US20090147594 Voltage regulator for semiconductor memory
06/11/2009US20090147579 Non-volatile memory systems and methods including page read and/or configuration features
06/11/2009US20090147568 Memory Elements and Methods of Using the Same
06/11/2009US20090147567 Magnetic memory cell structure with thermal assistant and magnetic dynamic random access memory
06/11/2009US20090147566 Phase Change Memory And Control Method Thereof
06/11/2009US20090147565 Method and apparatus for accessing a phase-change memory
06/11/2009US20090147564 Phase change memory cell having interface structures with essentially equal thermal impedances and manufacturing methods
06/11/2009US20090147563 Integrated circuit for programming a memory element
06/11/2009US20090147562 Compound cell spin-torque magnetic random access memory
06/11/2009US20090147561 Semiconductor storage device
06/11/2009US20090147560 Novel sram cell design to improve stability
06/11/2009US20090147559 Memory cell array and semiconductor memory device including the same
06/11/2009US20090147558 Variable resistance element, method for producing the same, and nonvolatile semiconductor storage device
06/11/2009US20090146219 Integrated circuit having memory cell array, and method of manufacturing same
06/11/2009US20090146130 Nitrogenated Carbon Electrode for Chalcogenide Device and Method of Making Same
06/10/2009EP1714287A4 Method and system for providing temperature dependent programming for magnetic memories
06/10/2009EP1671332B1 Non-volatile memory and method with bit line to bit line coupled compensation
06/10/2009EP1476872B1 Extraction of a binary code from physical parameters of an integrated circuit
06/10/2009DE19823485B4 Schaltung für eine Halbleiterspeichervorrichtung zum Feststellen eines Adresssignalübergangs Circuit for a semiconductor memory device for detecting an address signal transition
06/10/2009DE102008049062A1 Speicherzelle, Speicherbaustein, Baustein und Verfahren zum Zugreifen auf eine Speicherzelle Memory cell, memory block, block and method of accessing a memory cell
06/10/2009DE102008004510A1 Integrierte Schaltung und Verfahren zum Herstellen einer integrierten Schaltung Integrated circuit and method for fabricating an integrated circuit
06/10/2009DE102007042879B3 Speichervorrichtung mit Bewertungsschaltung für die elektrische Ladung einer Speicherzelle Memory device comprising evaluation circuit for the electric charge of a memory cell
06/10/2009CN101454841A Method and apparatus for a dummy sram cell
06/10/2009CN101454840A Semiconductor device
06/10/2009CN101454839A Memory array having a segmented bit line architecture
06/10/2009CN101454838A Nanostructures and a method for the manufacture of the same
06/10/2009CN101452743A Writing-in system and method for phase change memory
06/10/2009CN101452742A Method for improving SRAM matching degree
06/10/2009CN101452741A Static interpretation method for reducing SRAM power consumption
06/10/2009CN101452739A Semiconductor memory
06/10/2009CN101452738A Semiconductor memory
06/10/2009CN101452737A Multiport memory based on dynamic random access memory core
06/10/2009CN100498974C Circuit and method for controlling boosting voltage
06/10/2009CN100498972C Semiconductor memory device
06/10/2009CN100498971C Semiconductor memory equipment and writing method of semiconductor memory equipment
06/09/2009US7546506 DRAM stacked package, DIMM, and semiconductor manufacturing method
06/09/2009US7545690 Method for evaluating memory cell performance
06/09/2009US7545686 Device for setting up a write current in an MRAM type memory and memory comprising
06/09/2009US7545682 Erase block data splitting
06/09/2009US7545674 Flash memory with low tunnel barrier interpoly insulators
06/09/2009US7545672 Spin injection write type magnetic memory device
06/09/2009US7545671 Static random access memory cell with improved stability
06/09/2009US7545670 Dual word line or floating bit line low power SRAM
06/09/2009US7545669 Resistive memory device
06/09/2009US7545668 Mushroom phase change memory having a multilayer electrode
06/09/2009US7545667 Programmable via structure for three dimensional integration technology
06/09/2009US7545199 Power supply circuit for oscillator of semiconductor memory device and voltage pumping device using the same
06/09/2009US7545192 Clock stop detector
06/09/2009US7543924 Printhead assembly
06/04/2009WO2009070804A1 Adjustable write pulse generator within a chalcogenide memory device
06/04/2009WO2009070595A1 Non-volatile single-event upset tolerant latch circuit
06/04/2009WO2009070201A1 Sensor for a magnetic memory device and method of manufacturing the same