Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
04/2009
04/30/2009US20090109741 Determining history state of data in data retaining device based on state of partially depleted silicon-on-insulator
04/30/2009US20090109740 Semiconductor device using magnetic domain wall movement
04/30/2009US20090109739 Low current switching magnetic tunnel junction design for magnetic memory using domain wall motion
04/30/2009US20090109738 Phase-change memory device with error correction capability
04/30/2009US20090109737 Method of restoring variable resistance memory device
04/30/2009US20090109736 Magnetic random access memory and operation method thereof
04/30/2009US20090109735 Design structure for initializing reference cells of a toggle switched mram device
04/30/2009US20090109734 Non-volatile sram cell
04/30/2009US20090109733 Design structure for sram active write assist for improved operational margins
04/30/2009US20090109732 Asymmetrical sram cell with separate word lines
04/30/2009US20090109731 Dielectric layers and memory cells including metal-doped alumina
04/30/2009US20090109730 Resistance memory element
04/30/2009US20090109729 Resistance change memory device and method for erasing the same
04/30/2009US20090109728 Resistance change memory device
04/30/2009US20090109727 Erase, programming and leakage characteristics of a resistive memory device
04/30/2009US20090109726 Non-linear conductor memory
04/30/2009DE102008039561A1 Integrierte Schaltkreise, Verfahren zum Herstellen eines integrierten Schaltkreises und Speichermodule Integrated circuits, processes for manufacturing an integrated circuit and memory modules
04/29/2009EP2053613A1 Synthetic-ferrimagnet sense-layer for high density MRAM applications
04/29/2009EP2053612A2 Semiconductor integrated circuit and semiconductor memory device including overdriving sense amplifier
04/29/2009EP2052390A2 Method and apparatus for reading a multi-level passive element memory cell array
04/29/2009EP2052389A2 Solid state storage element and method
04/29/2009EP1977425A4 Multiple port memory having a plurality of parallel connected trench capacitors in a cell
04/29/2009EP1687838A4 A high temperature memory device
04/29/2009CN101421793A NAND memory device column charging
04/29/2009CN101420013A Resistor conversion memory cell
04/29/2009CN101420012A Non-volatile resistor transition type memory embedded into nano-crystalline granule
04/29/2009CN101419966A Semiconductor integrated circuit device
04/29/2009CN101419940A Method for making memory cell assembly and the memory cell assembly
04/29/2009CN101419836A Phase change RAM
04/29/2009CN100483944C Mixed latch trigger
04/29/2009CN100483767C Silver-selenide/chalcogenide glass stack for resistance variable memory
04/29/2009CN100483714C Circuit for preventing latch-up in cmos memory cell
04/29/2009CN100483558C Memory independent on testing group function and system for replacing fault stored word
04/29/2009CN100483557C Circuit and method for test and repair
04/29/2009CN100483551C Semiconductor memory device
04/29/2009CN100483550C Special-purpose redundant circuit for different operations in internal memory device and its operation method
04/29/2009CN100483549C Complementary bit pcram sense amplifier and method of operation
04/29/2009CN100483547C SRAM array with improved cell stability
04/29/2009CN100483546C Software refreshed memory device and method
04/29/2009CN100483545C Programmable conductor random access memory and method for sensing same
04/29/2009CN100483544C Magnetic random access memory having a vertical write line
04/29/2009CN100483543C Magnetic random access memory device
04/29/2009CN100483542C Nonvolatile memory cell and non-volatile semiconductor memory device
04/29/2009CN100483540C Resistance crosspoint storage array with charge injection differential read-out amplifier
04/29/2009CN100483363C Semiconductor integrated circuit and power-saving control method thereof
04/28/2009US7526713 Low power cost-effective ECC memory system and method
04/28/2009US7526601 Data rewriting method for flash memory using partial erases
04/28/2009US7525871 Semiconductor integrated circuit
04/28/2009US7525868 Multiple-port SRAM device
04/28/2009US7525862 Methods involving resetting spin-torque magnetic random access memory with domain wall
04/28/2009US7525848 Method for erasing and changing data of floating gate flash memory
04/28/2009US7525846 Memory device
04/28/2009US7525845 Non-volatile semiconductor storage device
04/28/2009US7525844 Semiconductor memory device with MOS transistors each having floating gate and control gate and method of controlling the same
04/28/2009US7525838 Flash memory device and method for programming multi-level cells in the same
04/28/2009US7525837 Magnetoresistive effect element and magnetic memory
04/28/2009US7525836 Non-imprinting memory with high speed erase
04/28/2009US7525835 Method and apparatus for reduced power cell
04/28/2009US7525834 SRAM cell structure and circuits
04/28/2009US7525833 Nanoscale shift register and signal demultiplexing using microscale/nanoscale shift registers
04/28/2009US7525832 Memory device and semiconductor integrated circuit
04/28/2009US7525831 Method for improving sensing margin of electrically programmable fuses
04/28/2009US7525830 Nonvolatile ferroelectric perpendicular electrode cell, FeRAM having the cell and method for manufacturing the cell
04/28/2009US7525410 Point contact array, not circuit, and electronic circuit using the same
04/28/2009US7524047 Print roll cartridge with an ink supply core for a camera system
04/28/2009US7524031 Inkjet printhead nozzle incorporating movable roof structures
04/28/2009US7524018 Printer cartridge with capping seal surrounding orifice surface
04/23/2009WO2009052527A1 Managing memory systems containing components with asymmetric characteristics
04/23/2009WO2009052525A1 Managing memory systems containing components with asymmetric characteristics
04/23/2009WO2009052371A2 Ground level precharge bit line scheme for read operation in spin transfer torque magnetoresistive random access memory
04/23/2009WO2009052013A1 Multivalue memory storage with two gating transistors
04/23/2009WO2009052012A1 Selectively-powered memories
04/23/2009WO2009051729A1 Method of magnetic tunneling layer processes for spin-transfer torque mram
04/23/2009WO2009051441A1 Method for recording of information in magnetic recording element and method for recording of information in magnetic random access memory
04/23/2009WO2009051435A1 Ultrafast magnetic recording element and nonvolatile magnetic random access memory using the magnetic recording element
04/23/2009WO2007061666A3 Volatile memory elements with boosted output voltages for programmable logic device integrated circuits
04/23/2009WO2007058777A3 Radiation tolerant combinational logic cell
04/23/2009US20090103402 Method and apparatus for generating absolute time in pregroove data
04/23/2009US20090103369 Non-Volatile Memory and Method with Shared Processing for an Aggregate of Read/Write Circuits
04/23/2009US20090103368 Semiconductor memory device
04/23/2009US20090103367 One-transistor cell semiconductor on insulator random access memory
04/23/2009US20090103364 Serial interface nand
04/23/2009US20090103358 Reducing programming error in memory devices
04/23/2009US20090103356 Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
04/23/2009US20090103355 Nonvolatile semiconductor memory and data programming/erasing method
04/23/2009US20090103354 Ground Level Precharge Bit Line Scheme for Read Operation in Spin Transfer Torque Magnetoresistive Random Access Memory
04/23/2009US20090103353 Semiconductor memory device
04/23/2009US20090103352 DRAM including a reduced storage capacitor
04/23/2009US20090103351 Integrated Circuit, Method of Manufacturing an Integrated Circuit, and Memory Module
04/23/2009US20090103350 Method of Testing an Integrated Circuit, Method of Manufacturing an Integrated Circuit, and Integrated Circuit
04/23/2009US20090103349 Semiconductor memory device
04/23/2009US20090103348 2t/2c ferroelectic random access memory with complementary bit-line loads
04/23/2009US20090103346 Semiconductor device
04/23/2009US20090102751 Memory element and display device
04/23/2009DE102008048630A1 Speichersystem und Verfahren zum Verwenden eines Speichersystems mit Virtuelladressübersetzungsfähigkeiten Storage system and method of using a memory system with virtual address translation capabilities
04/23/2009DE102004062224B4 Halbleitervorrichtung und Halbleitervorrichtungsmodul Semiconductor device and semiconductor device module
04/23/2009DE102004028808B4 Speichersystem, das mit einem externen Speichersystem verbunden ist und Verfahren zum Verbinden derartiger Systeme Memory system that is connected to an external storage system and method for connecting such systems
04/23/2009CA2702487A1 Ground level precharge bit line scheme for read operation in spin transfer torque magnetoresistive random access memory
04/22/2009EP2051259A1 MRAM with resistive property adjustment
04/22/2009EP2049341A2 Multifunctional nanoscopy for imaging cells