Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
---|
07/07/1998 | US5777491 High-performance differential cascode voltage switch with pass gate logic elements |
07/02/1998 | WO1998028940A1 Management of data structures |
07/02/1998 | WO1998028680A1 Method and apparatus for performing a masked byte addition operation |
07/02/1998 | CA2241883A1 Management of data structures |
07/01/1998 | EP0851343A2 System for processing floating point operations |
07/01/1998 | EP0850482A1 Method and apparatus for detecting assertion of multiple signals |
07/01/1998 | EP0850440A1 Secure module with microprocessor and co-processor |
07/01/1998 | CN1186579A Process for computer-controlled exchange of cryptographic keys between first and second computer unit |
06/30/1998 | US5774707 Control device and method for variably controlling an operation time of an operation apparatus |
06/30/1998 | US5774697 Data realignment method and apparatus |
06/30/1998 | US5774462 Unique word recognition system |
06/30/1998 | US5774389 Error correction apparatus |
06/30/1998 | CA2225899A1 A method and apparatus for finite field multiplication |
06/30/1998 | CA2119283C Multiplier circuit and division circuit |
06/30/1998 | CA2062441C A data shifting circuit capable of an original data width rotation and a double data width rotation. |
06/25/1998 | DE19746054A1 Method of a single instruction operation with doubled accuracy |
06/24/1998 | EP0849664A2 Apparatus for computing transcendental functions quickly |
06/24/1998 | EP0849663A2 Conditional sum adder using pass-transistor logic |
06/24/1998 | EP0849662A2 Arithmetic operation and rounding system |
06/24/1998 | CN1185606A Single-order multi-data correction circuit facing to arithmetic/shift operation |
06/23/1998 | US5771391 Computer processor having a pipelined architecture and method of using same |
06/23/1998 | US5771186 System and method for multiplying in a data processing system |
06/23/1998 | US5771184 System and method for solving quadratic equation in galois fields |
06/23/1998 | US5771183 Apparatus and method for computation of sticky bit in a multi-stage shifter used for floating point arithmetic |
06/23/1998 | US5770966 Area-efficient implication circuits for very dense lukasiewicz logic arrays |
06/18/1998 | WO1998026348A1 Multiple parallel identical finite state machines which share combinatorial logic |
06/17/1998 | EP0847552A1 An apparatus for performing multiply-add operations on packed data |
06/17/1998 | EP0847551A1 A set of instructions for operating on packed data |
06/17/1998 | EP0787304A4 Numerical comparator |
06/17/1998 | EP0707721A4 Programmable logic device with regional and universal signal routing |
06/16/1998 | US5768428 Method and circuit for reading code words having variable lengths out of a memory used for code words having fixed lengths of words |
06/16/1998 | US5768416 Information processing methodology |
06/16/1998 | US5768170 Method and apparatus for performing microprocessor integer division operations using floating point hardware |
06/16/1998 | US5768169 Method and apparatus for improved processing of numeric applications in the presence of subnormal numbers in a computer system |
06/16/1998 | US5768168 Universal galois field multiplier |
06/16/1998 | US5767864 One chip semiconductor integrated circuit device for displaying pixel data on a graphic display |
06/11/1998 | WO1998025201A1 Method and apparatus for selecting a rounding mode for a numeric operation |
06/09/1998 | US5765026 In a data processing system |
06/09/1998 | US5765015 Slide network for an array processor |
06/09/1998 | US5765013 Digital signal processor |
06/09/1998 | US5765012 Controller for a SIMD/MIMD array having an instruction sequencer utilizing a canned routine library |
06/09/1998 | US5765011 Parallel processing system having a synchronous SIMD processing with processing elements emulating SIMD operation using individual instruction streams |
06/09/1998 | US5764990 Compact encoding for storing integer multiplication Sequences |
06/09/1998 | US5764854 Data processor for performing a fuzzy logic weighting function and method therefor |
06/09/1998 | US5764558 Method and system for efficiently multiplying signed and unsigned variable width operands |
06/09/1998 | US5764557 Product-sum calculation apparatus, product-sum calculating unit integrated circuit apparatus, and cumulative adder suitable for processing image data |
06/09/1998 | US5764556 Method and apparatus for performing floating point addition |
06/09/1998 | US5764555 Method and system of rounding for division or square root: eliminating remainder calculation |
06/09/1998 | US5764554 Method for the implementation of modular reduction according to the Montgomery method |
06/09/1998 | US5764553 Generalized data processing path for performing transformation and quantization functions for video encoder systems |
06/09/1998 | US5764550 Arithmetic logic unit with improved critical path performance |
06/09/1998 | US5764044 Process for producing time dependent waveforms of positive and negative symmetrical sequence components of a power system's voltages or currents |
06/04/1998 | WO1998024030A1 Method in connection with serial data transfer to recognize a fixed pattern |
06/04/1998 | CA2273024A1 Method in connection with serial data transfer to recognize a fixed pattern |
06/03/1998 | EP0845741A2 Processor which can favorably execute a rounding process |
06/03/1998 | EP0845740A1 A multiplier unit |
06/03/1998 | EP0845734A2 Pulse signal generation circuit and pulse signal generation method |
06/02/1998 | US5761523 Parallel processing system having asynchronous SIMD processing and data parallel coding |
06/02/1998 | US5761521 Processor for character strings of variable length |
06/02/1998 | US5761305 Key agreement and transport protocol with implicit signatures |
06/02/1998 | US5761265 Parallel architecture for generating pseudo-random sequences |
06/02/1998 | US5761213 Method and apparatus to determine erroneous value in memory cells using data compression |
06/02/1998 | US5761107 Method and apparatus for improving the speed of a logic circuit |
06/02/1998 | US5761106 Horizontally pipelined multiplier circuit |
06/02/1998 | US5761105 Reservation station including addressable constant store for a floating point processing unit |
06/02/1998 | US5761104 Computer processor having a pipelined architecture which utilizes feedback and method of using same |
06/02/1998 | US5761103 Left and right justification of single precision mantissa in a double precision rounding unit |
06/02/1998 | US5761102 System and method for determining the cube root of an element of a galois field GF(2) |
06/02/1998 | US5761077 Graph partitioning engine based on programmable gate arrays |
05/28/1998 | WO1998022915A1 Transaction system |
05/28/1998 | WO1998022871A1 Integrated pre-adder for a multiplier |
05/28/1998 | WO1998022870A1 Multiplier for performing 3d graphics interpolations |
05/27/1998 | EP0752130B1 Multiplier with reduced run time |
05/27/1998 | CN1182980A Threshold logic circuit needing miniature area |
05/27/1998 | CN1182911A Division device |
05/27/1998 | CN1182910A N-bit comparator |
05/26/1998 | US5758357 Fast DB2 tablespace reorganization method that is restartable after interruption of the process |
05/26/1998 | US5758324 Resume storage and retrieval system |
05/26/1998 | US5758148 System and method for searching a data base using a content-searchable memory |
05/26/1998 | US5757923 Method of generating secret identification numbers |
05/26/1998 | US5757688 Method and apparatus for high speed division |
05/26/1998 | US5757687 Method and apparatus for bounding alignment shifts to enable at-speed denormalized result generation in an FMAC |
05/26/1998 | US5757686 Method of decoupling the high order portion of the addend from the multiply result in an FMAC |
05/26/1998 | US5757685 Data processing system capable of processing long word data |
05/26/1998 | US5757682 Parallel calculation of exponent and sticky bit during normalization |
05/26/1998 | US5757377 Expediting blending and interpolation via multiplication |
05/26/1998 | CA2065341C Method and apparatus for high precision weighted random pattern generation |
05/22/1998 | WO1998021698A1 Method for processing leaf items, specially bank notes |
05/20/1998 | EP0777883A4 X.500 system and methods |
05/20/1998 | CN1182494A Electronic credit card and process for reloading an electronic credit card |
05/20/1998 | CN1182236A High speed comparator with programmable reference |
05/19/1998 | US5754885 Apparatus and method for selecting entries from an array |
05/19/1998 | US5754871 Parallel processing system having asynchronous SIMD processing |
05/19/1998 | US5754805 Instruction in a data processing system utilizing extension bits and method therefor |
05/19/1998 | US5754616 Two-phase counter circuit |
05/19/1998 | US5754569 Apparatus and method for comparing and validating digital words |
05/19/1998 | US5754461 Arithmetic processing method |
05/19/1998 | US5754460 Method for performing signed division |
05/19/1998 | US5754459 Multiplier circuit design for a programmable logic device |
05/19/1998 | US5754458 Trailing bit anticipator |