| Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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| 06/09/1999 | EP0753172B1 Processing system and method of operation |
| 06/09/1999 | EP0498534B1 Artificial random-number pattern generating circuit |
| 06/09/1999 | CN1219253A Data processing condition code flags |
| 06/08/1999 | US5910956 Random time interval generator |
| 06/08/1999 | US5910910 Circuit and method for rapid calculation of quotients and square roots |
| 06/08/1999 | US5910907 Shift register based pseudorandom number generator |
| 06/08/1999 | US5910898 Method for verifying structural equivalence |
| 06/08/1999 | US5910762 Multiple-bit comparator with reliable output timing and reduced hazards |
| 06/03/1999 | WO1999027437A1 Apparatus for multiprecision integer arithmetic |
| 06/03/1999 | WO1999012212A3 Lone-electron circuit arrangement, operating mode, and application for adding binary numbers |
| 06/02/1999 | EP0919910A1 Multiple data path processor with a three-input adder |
| 06/02/1999 | CA2254753A1 Arithmetic unit and data processing unit |
| 06/01/1999 | US5909565 Microprocessor system which efficiently shares register data between a main processor and a coprocessor |
| 06/01/1999 | US5909552 Method and apparatus for processing packed data |
| 06/01/1999 | US5909520 Noise coding processor |
| 06/01/1999 | US5909494 System and method for constructing a cryptographic pseudo random bit generator |
| 06/01/1999 | US5909386 Digital adder |
| 06/01/1999 | US5909385 Multiplying method and apparatus |
| 06/01/1999 | US5909144 Digital method and apparatus for reducing EMI emissions in digitally-clocked systems |
| 06/01/1999 | CA2139530C Vehicle remote keyless entry system with rolling code encryption |
| 05/27/1999 | WO1999026253A1 Programmable access protection in a flash memory device |
| 05/27/1999 | CA2310080A1 Programmable access protection in a flash memory device |
| 05/26/1999 | EP0918292A2 Minimum and maximum value searching method |
| 05/26/1999 | EP0918267A2 Method for transforming failure transitions of the finite-state machine into a succes transitions |
| 05/26/1999 | EP0706735B1 Method for cryptographic authentication of transmitted messages using pseudorandom numbers |
| 05/26/1999 | CN1217834A Circuit arrangement for generating random bit sequences |
| 05/25/1999 | US5907865 Method and data processing system for dynamically accessing both big-endian and little-endian storage schemes |
| 05/25/1999 | US5907847 Method and apparatus for coupling object state and behavior in a database management system |
| 05/25/1999 | US5907842 In a processor for processing instructions |
| 05/25/1999 | US5907716 Fifo buffer capable of partially erasing data set held therein |
| 05/25/1999 | US5907711 Method and apparatus for transforming multiplications into product table lookup references |
| 05/25/1999 | US5907590 Frequency dividing circuit, frequency dividing method and telephone terminal device incorporating the frequency dividing circuit |
| 05/25/1999 | US5907499 Hardware implemented divider for binary numbers using a redundant binary representation |
| 05/25/1999 | US5907498 Circuit and method for overflow detection in a digital signal processor having a barrel shifter and arithmetic logic unit connected in series |
| 05/20/1999 | WO1999025091A1 Apparatus, and associated method, for generating a pseudo-random number |
| 05/20/1999 | WO1999024901A1 Computer processor and method for data streaming |
| 05/20/1999 | WO1999005591A3 Method and apparatus for providing a bioinformatics database |
| 05/20/1999 | DE19846828A1 Combined binary and decimal adder for use in computer system |
| 05/19/1999 | EP0917047A2 Method and apparatus for modular inversion for information security and recording medium with a program for implementing the method |
| 05/19/1999 | EP0917032A2 Constructing method of pattern-matching machine performing transitions according to a partial type of success function and a failure function |
| 05/19/1999 | EP0917031A2 Method for transforming failure transitions of the pattern-matching machine into a sucess transition |
| 05/19/1999 | EP0917030A2 Method for transforming failure transitions of the pattern-matching machine into a success transition |
| 05/19/1999 | EP0917029A2 Method for transforming failure transitions of the finite-state machine into a success transition |
| 05/19/1999 | EP0916208A1 Accelerating public-key cryptography by precomputing randomly generated pairs |
| 05/18/1999 | US5905757 Filter co-processor |
| 05/18/1999 | US5905667 Full adder using NMOS transistor |
| 05/18/1999 | US5905665 Modulo address generating circuit and method with reduced area and delay using low speed adders |
| 05/18/1999 | US5905664 Circuit for determining, in parallel, the terms of a remainder that results from dividing two binary polynomials |
| 05/18/1999 | US5905662 Digital processing system for binary addition/subtraction |
| 05/18/1999 | US5905661 Computer program |
| 05/18/1999 | US5905660 Discrete cosine transform circuit for processing an 8×8 block and two 4×8 blocks |
| 05/18/1999 | US5905428 N-bit comparator using count leading 1 circuits |
| 05/18/1999 | US5904731 For calculating a sum of products of outputs |
| 05/18/1999 | US5904255 Apparatus and method for sorting objects |
| 05/14/1999 | WO1999023781A1 Signature verification for elgamal schemes |
| 05/14/1999 | WO1999023548A2 Multifunction floating point addition/subtraction pipeline and bipartite look-up table |
| 05/14/1999 | CA2306468A1 Signature verification for elgamal schemes |
| 05/12/1999 | EP0915415A2 Stack pointer with post increment/decrement operation |
| 05/11/1999 | US5903780 Data sorting device having multi-input comparator comparing data input from latch register and key value storage devices |
| 05/11/1999 | US5903779 System and method for efficient packing data into an output buffer |
| 05/11/1999 | US5903486 Device for digitally carrying out a division operation |
| 05/11/1999 | US5903485 Circuit that finds the integer remainder |
| 05/11/1999 | US5903484 Tree circuit |
| 05/11/1999 | US5903470 Method and apparatus for automatically designing logic circuit, and multiplier |
| 05/11/1999 | US5903043 Semiconductor device and an arithmetic and logic unit, a signal converter and a signal processing system using the same |
| 05/11/1999 | CA2019064C Deferred comparison multiplier checker |
| 05/06/1999 | WO1999022292A1 Fast regular multiplier architecture |
| 05/06/1999 | WO1998045774A9 Arithmetic unit and arithmetic method |
| 05/06/1999 | EP0913778A1 A commutator circuit |
| 05/06/1999 | EP0912922A1 Method and system for performing a boolean operation on bit strings using a maximal bit slice |
| 05/06/1999 | EP0912921A1 Method of generating signal amplitude responsive to desired function, and converter |
| 05/06/1999 | CA2304334A1 Fast regular multiplier architecture |
| 05/05/1999 | CN1216129A Communication system with master station and at least one slave station |
| 05/05/1999 | CN1215862A Computing method and computing apparatus |
| 05/04/1999 | US5901306 Method and apparatus for reducing a computational result to the range boundaries of a signed 8-bit integer in case of overflow |
| 05/04/1999 | US5901076 Ripple carry shifter in a floating point arithmetic unit of a microprocessor |
| 05/04/1999 | US5900884 Parametric curve generating device generating a Bezier curve for font character utilization or an arbitrary parametric curve |
| 05/04/1999 | US5900023 Method and apparatus for removing power-of-two restrictions on distributed addressing |
| 04/29/1999 | WO1999021320A1 Accelerated signature verification on an elliptic curve |
| 04/29/1999 | WO1999021079A1 Alternate randomizing for even/odd data tracks |
| 04/29/1999 | WO1999021078A2 A method and apparatus for multi-function arithmetic |
| 04/29/1999 | DE19849774A1 Byte switching circuit in arithmetic unit |
| 04/29/1999 | DE19743089A1 Vorrichtung und Verfahren zur Erzeugung eines Fehlersignals bei einem Kraftfahrzeug Apparatus and method for generating an error signal in a motor vehicle |
| 04/28/1999 | EP0911979A2 Audio signal processor |
| 04/28/1999 | CN1215287A Data transposition system |
| 04/28/1999 | CN1215259A Data decoding equipment and method |
| 04/27/1999 | US5898896 Method and apparatus for data ordering of I/O transfers in Bi-modal Endian PowerPC systems |
| 04/27/1999 | US5898604 Digital Signal Processor employing a random-access memory and method for performing multiplication |
| 04/27/1999 | US5898602 Carry chain circuit with flexible carry function for implementing arithmetic and logical functions |
| 04/27/1999 | US5898596 Adder which employs both carry look-ahead and carry select techniques |
| 04/27/1999 | US5898333 1.5 bootstrapped pass-transistor-based Manchester-carry-chain circuit suitable for low-voltage CMOS VLSI |
| 04/27/1999 | US5898319 Method and structure for providing fast conditional sum in a field programmable gate array |
| 04/22/1999 | WO1999019785A1 Apparatus and method for generating a distributed clock signal using gear ratio techniques |
| 04/21/1999 | EP0910039A2 Graphics accelerator |
| 04/21/1999 | EP0909495A1 Public key cryptography method |
| 04/20/1999 | US5896541 Null convention register file |
| 04/20/1999 | US5896308 Combinational logic circuit |
| 04/20/1999 | US5896307 Method for handling an underflow condition in a processor |
| 04/20/1999 | US5895498 Arithmetic processor which latches data in a temporary register before the data is latched in a general purpose register |
| 04/15/1999 | WO1999018664A1 Cmos differential voltage controlled logarithmic attenuator and method |