Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
08/1999
08/31/1999US5946473 LFSR implementation using split-table lookup
08/31/1999US5946223 Subtraction/shift-type dividing device producing a 2-bit partial quotient in each cycle
08/31/1999US5946222 Method and apparatus for performing a masked byte addition operation
08/31/1999US5946000 Memory construct using a LIFO stack and a FIFO queue
08/31/1999US5945657 Constant divider
08/31/1999US5945260 Method for manufacturing liquid jet recording head
08/31/1999US5944813 FPGA input output buffer with registered tristate enable
08/31/1999US5944777 Method and apparatus for generating carries in an adder circuit
08/31/1999US5944776 Fast carry-sum form booth encoder
08/31/1999US5944775 Sum-of-products arithmetic unit
08/31/1999US5944774 Methods apparatus and computer program products for accumulating logarithmic values
08/31/1999US5944773 Floating-point multiplier circuit for generating the sticky-bit from the input operands
08/31/1999US5944772 Combined adder and logic unit
08/31/1999US5944771 Arithmetic operation system for binary addition/subtraction
08/26/1999WO1999043124A1 Elliptic curve cryptographic process and device for a computer
08/26/1999CA2321478A1 Method and device for cryptographic processing with the aid or an elliptic curve on a computer
08/25/1999EP0938192A2 Pseudo-noise sequence generating apparatus
08/25/1999EP0938043A2 Low power multiplier for CPU and DSP
08/25/1999EP0938042A2 High accuracy estimates of elementary functions
08/25/1999EP0823083A4 System for performing arithmetic operations with single or double precision
08/25/1999EP0649558B1 Transmission system comprising at least a coder
08/25/1999EP0649557B1 Transmission system comprising at least a coder
08/25/1999CN1226767A Pseudo-noise generating apparatus
08/25/1999CN1226697A Arithmetic unit and data processing unit
08/24/1999US5943377 Method and device for bit pattern detection
08/24/1999US5943251 Adder which handles multiple data with different data types
08/24/1999US5943250 Parallel multiplier that supports multiple numbers with different bit lengths
08/24/1999US5943248 w-bit non-linear combiner for pseudo-random number generation
08/24/1999US5941942 Method for multiplying a multiplicand and a multiplier according to the booth method in interactive steps
08/24/1999US5941941 Bit width controlling method
08/24/1999US5941940 Digital signal processor architecture optimized for performing fast Fourier Transforms
08/24/1999US5941938 System and method for performing an accumulate operation on one or more operands within a partitioned register
08/19/1999WO1999041834A1 Method of and apparatus for generating random numbers
08/19/1999WO1999041659A1 Microprocessor including multiple register files occupying the same logical space
08/19/1999DE19736954A1 Computer-aided number sequence mixing method
08/18/1999EP0936564A2 Bit and digit reversal methods
08/18/1999CN1226323A Data processing apparatus registers
08/18/1999CN1226039A Exponential calculation device and decoding device
08/17/1999US5940863 Apparatus for de-rotating and de-interleaving data including plural memory devices and plural modulo memory address generators
08/17/1999US5940585 In a data processing pipeline
08/17/1999US5940334 Memory interface circuit including bypass data forwarding with essentially no delay
08/17/1999US5940311 Immediate floating-point operand reformatting in a microprocessor
08/17/1999US5940289 Parallel database system retrieval method of a relational database management system using initial data retrieval query and subsequent sub-data utilization query processing for minimizing query time
08/17/1999US5939693 Polynomial calculator device, and method therefor
08/17/1999US5938784 Linear feedback shift register, multiple input signature register, and built-in self test circuit using such registers
08/17/1999US5938763 System for transposing data from column order to row order
08/12/1999WO1999040508A1 Fast adder/subtractor for signed floating point numbers
08/12/1999WO1999021078A3 A method and apparatus for multi-function arithmetic
08/11/1999EP0935371A2 Multiported register file for updating the coefficients of a burst mode FIR filter
08/11/1999EP0935203A2 Exponential calculation device
08/11/1999CN1225468A High accuracy estimates of elementary functions
08/11/1999CN1225467A Method and apparatus for generating less than (LT) greater than (GT), and equal to (EQ) condition code bits concurrent with arithmetic or logical operation
08/11/1999CN1044646C Dynamic multi-mode parallel processor array architecture computer system
08/10/1999US5937438 Sine/cosine lookup table
08/10/1999US5937403 Integer permutation method and integer permutation system
08/10/1999US5937017 Complex signal limiting
08/10/1999US5936872 In a data processing system
08/10/1999US5936870 Arithmetic operating device for digital signal processing and method therefor
08/10/1999US5936560 Data compression method and apparatus performing high-speed comparison between data stored in a dictionary window and data to be compressed
08/10/1999US5936427 Three-input exclusive NOR circuit
08/10/1999US5935239 Parallel mask decoder and method for generating said mask
08/10/1999US5935237 Microprocessor capable of carrying out different data length instructions
08/10/1999US5935203 Rectifying transfer gate circuit
08/10/1999US5935202 Compressor circuit in a data processor and method therefor
08/10/1999US5935201 Multiplier circuit for multiplication operation between binary and twos complement numbers
08/10/1999US5935200 Exponential functional relationship generator method and system for implementation in digital logic
08/10/1999US5935198 Multiplier with selectable booth encoders for performing 3D graphics interpolations with two multiplies in a single pass through the multiplier
08/10/1999US5935197 Data processing circuit and method of operation performing arithmetic processing on data signals
08/05/1999WO1999039434A1 Method and arrangement for generating binary sequences of random numbers
08/05/1999WO1999039270A1 Polynomial calculator device, and method therefor
08/05/1999WO1999023548A3 Multifunction floating point addition/subtraction pipeline and bipartite look-up table
08/05/1999DE19806178A1 Verfahren und Anordnung zur Erzeugung binärer Sequenzen von Zufallszahlen Method and apparatus for generating binary sequences of random numbers
08/04/1999EP0933877A2 A multi-dimensional galois field multiplier
08/04/1999EP0933695A2 IC card equipped with elliptic curve encryption processing facility
08/04/1999EP0870225A4 Structure and method for signed multiplication using large multiplier having two embedded signed multiplers
08/04/1999CN1044523C Digital comparator
08/03/1999US5933797 Adaptive dual filter echo cancellation
08/03/1999US5933650 In a computer system
08/03/1999US5933504 Strengthened public key protocol
08/03/1999US5933362 Method of adding two binary numbers and binary adder used therein
08/03/1999US5933360 Method and apparatus for signal compression and processing using logarithmic differential compression
08/03/1999US5931943 Floating point NaN comparison
08/03/1999US5931896 Floating point addition and subtraction arithmetic circuit performing preprocessing of addition or subtraction operation rapidly
08/03/1999US5931895 Floating-point arithmetic processing apparatus
08/03/1999US5931894 Power-sum circuit for finite field GF(2m)
08/03/1999CA2159300C Digital data sequence pattern filtering
07/1999
07/29/1999WO1999038142A1 Method and apparatus for arithmetic operation and recording medium of method of operation
07/29/1999WO1999038088A1 Method and apparatus for arithmetic operation
07/29/1999WO1999038069A1 Random number generation method and apparatus
07/29/1999WO1999031581A3 Method and apparatus for address analysis based on boolean logic
07/29/1999WO1999031562A3 Binary adder
07/28/1999EP0931286A1 Stack oriented data processing device
07/28/1999CN1224555A Public key cryrography method
07/27/1999US5930518 Arithmetic unit
07/27/1999US5930291 Method and apparatus for selecting random values from a non-sequential set
07/27/1999US5930222 Pre-pit detecting device and information recording apparatus employing the same
07/27/1999US5930160 Multiply accumulate unit for processing a signal and method of operation
07/27/1999US5930159 Right-shifting an integer operand and rounding a fractional intermediate result to obtain a rounded integer result
07/27/1999US5929795 Digital processor for reduced distortion and frequency deviation
07/27/1999US5928319 Combined binary/decimal adder unit
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