Patents
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
10/1999
10/06/1999EP0947914A1 Computationally efficient modular multiplication method and apparatus
10/06/1999EP0947913A1 Improved method of implementing integer division
10/06/1999EP0734624A4 A non-deterministic public key encryption system
10/06/1999EP0620518B1 Methods and apparatus for generating linear-feedback-shift-register sequences
10/06/1999CN1231038A Arithmetic unit and arithmetic method
10/06/1999CN1230719A Crossed parallel processing method utilizing data correlation and serial operation
10/05/1999US5963745 Parallel array computer system
10/05/1999US5963744 Method and apparatus for custom operations of a processor
10/05/1999US5963726 Instrumentation system and method including an improved driver software architecture
10/05/1999US5963461 Floating point multiplier
10/05/1999US5963460 Apparatus for computing transcendental functions quickly
10/05/1999US5963104 In an integrated circuit
10/05/1999US5961640 Virtual contiguous FIFO having the provision of packet-driven automatic endian conversion
10/05/1999US5961635 Three input arithmetic logic unit with barrel rotator and mask generator
10/05/1999US5961581 Method and circuit for detecting address limit violations in a microprocessor-based computer
10/05/1999US5961578 Data processor and microcomputer
10/05/1999US5961577 Random binary number generator
10/05/1999CA2008774C Modular multiplication method and the system for processing data
09/1999
09/30/1999WO1999049386A1 Accelerated finite field operations on an elliptic curve
09/30/1999CA2251178A1 Computationally efficient modular multiplication method and apparatus
09/30/1999CA2251162A1 High speed montgomery value calculation
09/29/1999EP0945783A2 Variable length register device
09/29/1999CN1230058A Method for calculating phase shift coefficients of M sequence
09/28/1999US5960193 Apparatus and system for sum of plural absolute differences
09/28/1999US5960007 Circuits and methods for framing one or more data streams
09/28/1999US5959874 Method and apparatus for inserting control digits into packed data to perform packed arithmetic operations
09/28/1999US5959636 Method and apparatus for performing saturation instructions using saturation limit values
09/28/1999US5959540 Single-key security system
09/28/1999US5958039 Master-slave latches and post increment/decrement operations
09/28/1999US5958038 Computer processor with two addressable memories and two stream registers and method of data streaming of ALU operation
09/28/1999US5958000 Two-bit booth multiplier with reduced data path width
09/28/1999US5957999 Booth multiplier with squaring operation accelerator
09/28/1999US5957996 Digital data comparator and microprocessor
09/23/1999WO1999048020A2 Method and arrangement for computer-assisted determination of a representation specification
09/23/1999WO1999048017A2 Method and arrangement for computer-assisted determination of a membership function
09/23/1999CA2266259A1 Variable length register device
09/22/1999EP0944202A2 Method and apparatus for thwarting a cryptographic attack
09/22/1999EP0944177A2 Spread spectrum encoding device and method using data to send as initial values of sequence generator
09/22/1999EP0944080A1 Recording/reproducing device and recording/reproducing method
09/21/1999US5956755 Sequential permutation apparatus for rearranging input data
09/21/1999US5956732 Software system management device for maintaining revisions of a source code
09/21/1999US5956728 Object graph editing context and methods of use
09/21/1999US5956519 Picture end token in a system comprising a plurality of pipeline stages
09/21/1999US5956494 Method, apparatus, and computer instruction for enabling gain control in a digital signal processor
09/21/1999US5956265 Boolean digital multiplier
09/21/1999US5956264 Circuit arrangement for digital multiplication of integers
09/21/1999US5956263 Multiplication, division and square root extraction apparatus
09/21/1999US5954791 Multipliers with a shorter run time
09/21/1999US5954790 Method and apparatus for parallel prediction and computation of massive cancellation in floating point subtraction
09/21/1999US5954789 Quotient digit selection logic for floating point division/square root
09/21/1999US5954788 Apparatus for performing modular multiplication
09/21/1999US5954787 Method of generating sine/cosine function and apparatus using the same for use in digital signal processor
09/21/1999US5954786 Method for directing a parallel processing computing device to form an absolute valve of a signed valve
09/21/1999CA2012808C Digital word-serial multiplier circuitry
09/16/1999WO1999046942A2 Method for generating a broadcast challenge value
09/16/1999WO1999046674A1 Isolation levels and compensating transactions in an information system
09/16/1999WO1999046658A2 Method and apparatus for creation and management of a portfolio of securities
09/16/1999WO1999046657A2 Systems and methods for storing, retrieving, and manipulating data in medical processing devices
09/16/1999DE19900991A1 Differentiator in comb filter with reduced hardware extent
09/16/1999DE19811175A1 Verfahren und Anordnung zur Abwehr kryptoanalytischer Untersuchungen Method and system for defense against cryptanalytic research
09/16/1999DE19810576A1 Verfahren und Vorrichtung zur Frequenzmultiplikation oder -division Method and device for frequency multiplication or -Division
09/16/1999CA2323425A1 Method and apparatus for creation and management of a portfolio of securities
09/15/1999EP0942356A2 Method and apparatus for frequency multiplication or division
09/15/1999EP0941524A1 Transaction system
09/15/1999EP0941163A1 Method and device for producing an error signal in a motor vehicle
09/14/1999US5953454 Minimum distance storage device
09/14/1999US5953240 SIMD TCP/UDP checksumming in a CPU
09/14/1999US5951632 Parallel signal processing circuit, semiconductor device having the circuit, and signal processing system having the circuit
09/14/1999US5951631 Carry lookahead adder
09/14/1999US5951630 Digital adder circuit
09/14/1999US5951629 Method and apparatus for log conversion with scaling
09/10/1999WO1999045673A1 Pseudo-random sequence generator and associated method
09/10/1999WO1999045670A2 Mask generating polynomials for pseudo-random noise generators
09/10/1999WO1999045462A1 Data bus for signal processors
09/10/1999WO1999034554A3 Administration and utilization of secret fresh random numbers in a networked environment
09/08/1999EP0940944A2 Elliptic curve transformation device, utilization device and utilization system
09/08/1999EP0940011A1 Method of and apparatus for generating random numbers
09/08/1999EP0939927A1 Random time interval generator
09/08/1999CN1228176A Data de-rotator and de-interleaver
09/07/1999US5950232 Fetching apparatus for fetching data from a main memory
09/07/1999US5949719 Field programmable memory array
09/07/1999US5948099 Apparatus and method for swapping the byte order of a data item to effectuate memory format conversion
09/07/1999US5948079 System for non-sequential transfer of data packet portions with respective portion descriptions from a computer network peripheral device to host memory
09/07/1999US5948053 Digital signal processor architecture using signal paths to carry out arithmetic operations
09/07/1999US5948052 Apparatus using a logarithm based processor and an audio amplifier
09/07/1999US5948051 Device improving the processing speed of a modular arithmetic coprocessor
09/07/1999US5948049 Normalization circuitry
09/07/1999US5948048 Systems, methods and program products for representing a binary word as two binary words having fewer binary ones
09/07/1999CA2150683C A cryptographic method
09/02/1999WO1999044329A2 Encryption processor with shared memory interconnect
09/02/1999WO1999033184A3 Binary code converters and comparators
09/01/1999EP0939490A2 Coincidence Detection Circuit
09/01/1999EP0939363A1 Method for implementing modular multiplication according to the Montgomery method
09/01/1999EP0939362A1 Modular arithmetic coprocessor for fast execution of non-modular operations
09/01/1999EP0938790A2 A method and device for executing a decrypting mechanism through calculating a standardized modular exponentiation for thwarting timing attacks
09/01/1999EP0807287A4 Logarithm/inverse-logarithm converter utilizing a truncated taylor series and method of use thereof
09/01/1999EP0807285A4 Logarithm/inverse-logarithm converter utilizing second-order term and method of using same
09/01/1999CN1227679A Method and apparatus for generating random numbers
09/01/1999CN1227366A Low power multiplier for CPU and DSP
08/1999
08/31/1999US5946494 Method for minimizing the number of input terminals used in an operator