| Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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| 09/16/1997 | US5668525 Comparator circuit using two bit to four bit encoder |
| 09/12/1997 | WO1997033372A1 Threshold logic with improved signal-to-noise ratio |
| 09/12/1997 | WO1997033223A1 Packed-add and packed subtract operations |
| 09/12/1997 | WO1997033222A1 Apparatus for performing packed shift operations |
| 09/10/1997 | EP0794638A2 Differential detection receiver |
| 09/10/1997 | EP0794485A1 Method and device for bit pattern detection |
| 09/10/1997 | CN1159060A Field programmable memory array |
| 09/10/1997 | CN1159031A Processing program suitable for saturation airthmetic and control method thereof |
| 09/09/1997 | US5666547 Method and apparatus for framing a serial data stream |
| 09/09/1997 | US5666525 System and method for performing an efficient join operation on large tables with a small main memory |
| 09/09/1997 | US5666419 Encryption device and communication apparatus using same |
| 09/09/1997 | US5666301 Multiplier carrying out numeric calculation at high speed |
| 09/09/1997 | US5666300 Power reduction in a data processing system using pipeline registers and method therefor |
| 09/09/1997 | US5666298 Method for performing shift operations on packed data |
| 09/04/1997 | WO1997032249A1 System for performing arithmetic operations with single or double precision |
| 09/03/1997 | EP0793348A1 Phase lock loop circuit |
| 09/03/1997 | EP0793165A1 Modular arithmetic coprocessor for fast execution of non-modular operations |
| 09/03/1997 | EP0615635B1 Control method and circuit |
| 09/03/1997 | EP0610259B1 1-bit adder |
| 09/03/1997 | CN1158676A Versatile error correction system |
| 09/02/1997 | US5664212 NULL convention logic system |
| 09/02/1997 | US5664211 Null convention threshold gate |
| 09/02/1997 | US5664192 Method and system for accumulating values in a computing device |
| 09/02/1997 | US5664156 Microcontroller with a reconfigurable program status word |
| 09/02/1997 | US5664134 Data processor for performing a comparison instruction using selective enablement and wired boolean logic |
| 09/02/1997 | US5664078 Sorting apparatus and method for sorting data in sequence of reference levels indicated by the data |
| 09/02/1997 | US5664062 High performance max-min circuit for a Fuzzy inference engine |
| 08/28/1997 | WO1997031308A1 Method and apparatus for performing saturation instructions |
| 08/28/1997 | DE19708024A1 Logical combination circuit and parallel transfer adder |
| 08/27/1997 | EP0792041A2 Method and apparatus for block encryption |
| 08/27/1997 | CN1157960A Finite field inverter |
| 08/26/1997 | US5661763 Apparatus and method for detecting programmable length bit pattern in serial digital data stream |
| 08/26/1997 | US5661675 Positive feedback circuit for fast domino logic |
| 08/26/1997 | US5661674 Computer system |
| 08/26/1997 | US5661673 Multiplier for computing a product |
| 08/26/1997 | US5661421 Semiconductor integrated data matching circuit |
| 08/21/1997 | WO1997030387A1 Method of modifying the instruction set of a smart card |
| 08/21/1997 | CA2246247A1 Method of modifying the instruction set of a smart card |
| 08/20/1997 | EP0790551A1 Method of modifying the instruction set of a smart card |
| 08/20/1997 | EP0789870A1 Method and apparatus for custom operations of a processor |
| 08/20/1997 | CN1157437A Moving mail distributing and registering system |
| 08/20/1997 | CN1157436A Intelligence coding and decoding system |
| 08/19/1997 | US5659783 Operation unit with plural operation circuits having plural data buses providing plural operation modes |
| 08/19/1997 | US5659733 Sort processing method and apparatus for sorting data blocks using work buffer merge data records while sequentially transferring data records from work buffers |
| 08/19/1997 | US5659730 Computerized index file interrogation and comparison |
| 08/19/1997 | US5659703 Microprocessor system with hierarchical stack and method of operation |
| 08/19/1997 | US5659700 Apparatus and method for generating a modulo address |
| 08/19/1997 | US5659613 Method and apparatus for copy protection for various recording media using a video finger print |
| 08/19/1997 | US5659495 Numeric processor including a multiply-add circuit for computing a succession of product sums using redundant values without conversion to nonredundant format |
| 08/19/1997 | US5659242 Apparatus for comparing two waveforms in real time |
| 08/13/1997 | EP0788629A1 A galois field polynomial multiply/divide circuit and a digital signal processor incorporating same |
| 08/12/1997 | US5657484 Method for carrying out a boolean operation between any two bits of any two registers |
| 08/12/1997 | US5657350 Audio coder/decoder with recursive determination of prediction coefficients based on reflection coefficients derived from correlation coefficients |
| 08/12/1997 | US5657263 Computer processor having a pipelined architecture which utilizes feedback and method of using same |
| 08/12/1997 | US5657262 Arithmetic and logic computation device and control method |
| 08/12/1997 | US5657260 Priority detecting counter device |
| 08/12/1997 | US5656948 Null convention threshold gate |
| 08/07/1997 | WO1997028604A1 Energy economized pass-transistor logic circuit and full adder using the same |
| 08/06/1997 | EP0788237A1 Rational frequency divider and frequency synthesizer using the frequency divider |
| 08/06/1997 | EP0787325A1 Error correction method and apparatus for disk drive emulator |
| 08/06/1997 | EP0787321A2 Data processing circuits and interfaces |
| 08/06/1997 | EP0787304A1 Numerical comparator |
| 08/06/1997 | EP0758468A4 Digital frequency synthesizer |
| 08/06/1997 | EP0461214B1 METHOD AND APPARATUS FOR HIGH SPEED DETERMINATION OF Jth ROOTS AND RECIPROCALS OF Jth ROOTS |
| 08/06/1997 | CN1156279A Device for symmetrically reducing N lowest effective digit of M place digital signal |
| 08/05/1997 | US5655139 Execution unit architecture to support X86 instruction set and X86 segmented addressing |
| 08/05/1997 | US5655065 Mask generator usable with addressing schemes in either big endian or little endian format |
| 08/05/1997 | US5654911 Carry select and input select adder for late arriving data |
| 08/05/1997 | US5654650 High throughput FPGA control interface |
| 07/31/1997 | WO1997027535A1 Finite field multiplier circuit and use thereof in an error corrector decoder |
| 07/31/1997 | DE19702326A1 Self-timed algorithmic device |
| 07/31/1997 | DE19701937A1 Phase delay correction device |
| 07/31/1997 | DE19602991A1 Decentralised arrangement of pseudo random signal generators |
| 07/31/1997 | CA2244975A1 Finite field multiplier circuit and use thereof in an error corrector decoder |
| 07/30/1997 | EP0786867A1 Digital method and apparatus for reducing EMI emissions in digitally-clocked systems |
| 07/30/1997 | EP0786730A1 High performance, low cost microprocessor |
| 07/30/1997 | EP0786721A1 Floating point addition and subtraction arithmetic circuit performing preprocessing of addition or subtraction operation rapidly |
| 07/30/1997 | CN1155701A Systems, methods and program products for representing binary word as two binary words having fewer binary ones |
| 07/30/1997 | CA2196017A1 Floating point addition and subtraction arithmetic circuit performing preprocessing of addition or subtraction operation rapidly |
| 07/29/1997 | US5652904 Non-reconfigurable microprocessor-emulated FPGA |
| 07/29/1997 | US5652902 Asynchronous register for null convention logic systems |
| 07/29/1997 | US5652862 Method and appartus for determining a precision of an intermediate arithmetic for converting values between a first numeric format and a second numeric format |
| 07/29/1997 | US5652584 Data format converter |
| 07/23/1997 | EP0785503A1 Method of producing an error correcting parameter associated with the implementation of modular operations according to the Montgomery method |
| 07/23/1997 | EP0785502A1 Method of producing an error correcting parameter associated with the implementation of modular operations according to the Montgomery method |
| 07/23/1997 | CN1155117A High-speed multiplication device |
| 07/22/1997 | US5651121 Using mask operand obtained from composite operand to perform logic operation in parallel with composite operand |
| 07/22/1997 | US5650953 Reciprocal number arithmetic operating method and circuit which are used in modem |
| 07/22/1997 | US5650952 Circuit arrangement for forming the sum of products |
| 07/17/1997 | WO1997025668A1 Modular arithmetic coprocessor comprising an integer division circuit |
| 07/16/1997 | EP0784262A1 Device improving the processing speed of a modular arithmetic coprocessor |
| 07/15/1997 | US5649174 Microprocessor with instruction-cycle versus clock-frequency mode selection |
| 07/15/1997 | US5649150 Scannable last-in-first-out register stack |
| 07/15/1997 | US5649146 Modulo addressing buffer |
| 07/15/1997 | US5648925 Optimized operand formatting same |
| 07/15/1997 | US5648924 Method and apparatus for finding arctangents |
| 07/10/1997 | WO1997024813A1 Improved system for correction of three and four errors |
| 07/10/1997 | WO1997024812A1 Method for locating four errors in a reed-solomon or bch code |
| 07/10/1997 | WO1997024657A1 Computational array and method for calculating multiple terms of a polynomial in a single computing element |
| 07/10/1997 | WO1997024651A1 Lns-based computer processor and method of use thereof |