| Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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| 01/12/1999 | US5859789 For executing an instruction to multiply together pairs of objects |
| 01/12/1999 | US5859548 Charge recycling differential logic (CRDL) circuit and devices using the same |
| 01/12/1999 | US5857328 Exhaust manifold catalytic converter |
| 01/12/1999 | CA2133020C Minimum shift data arranging method and apparatus |
| 01/07/1999 | WO1999000746A1 Parallel arithmetic units and digital signal processor using the same |
| 01/07/1999 | EP0889416A2 Digital signal processor architecture optimized for performing fast fourier transforms |
| 01/07/1999 | EP0759198A4 Efficient median filter and method therefor |
| 01/07/1999 | DE19824796A1 Logic circuit with glitch prevention for VLSI circuitry |
| 01/05/1999 | US5857186 Parallel merge sorting apparatus with an accelerated section |
| 01/05/1999 | US5857089 Floating point stack and exchange instruction |
| 01/05/1999 | US5857022 Enhanced cryptographic system and method with key escrow feature |
| 01/05/1999 | US5856936 Calculating A - sign(A) in a single instruction cycle |
| 01/05/1999 | US5856831 Clamping system and method for clamping floating point color values from a geometry accelerator in a computer graphics system |
| 01/05/1999 | CA2142235C Fifo queue having replaceable entries |
| 12/30/1998 | EP0887930A2 Signal processing apparatus and method for processing signals |
| 12/30/1998 | EP0887728A2 Pseudorandom number sequence generator |
| 12/30/1998 | EP0887727A2 Multiplying circuit |
| 12/30/1998 | EP0886989A1 Management of data structures |
| 12/30/1998 | EP0755537B1 Priority queue filtering system and method of operation |
| 12/29/1998 | US5855016 Sorting system for serially processing records |
| 12/29/1998 | US5855013 Method and apparatus for creating and maintaining a computer database utilizing a multi-purpose data format |
| 12/29/1998 | US5854938 Parallel processor apparatus in which data is divided in sequential stages |
| 12/29/1998 | US5854918 Apparatus and method for self-timed algorithmic execution |
| 12/29/1998 | US5854759 Methods and apparatus for efficient finite field basis conversion |
| 12/29/1998 | US5854755 Clock frequency multiplication device |
| 12/27/1998 | CA2446831A1 System for transforming and exchanging data between distributed heterogeneous computer systems |
| 12/24/1998 | DE4434895C2 Verfahren und Vorrichtung zur Behandlung von Ausnahmebedingungen Method and apparatus for treatment of exception conditions |
| 12/23/1998 | WO1998058309A1 A random number generator |
| 12/23/1998 | EP0886430A2 Method for arranging image numbers |
| 12/23/1998 | EP0886236A2 Configurable data processing pipeline |
| 12/23/1998 | EP0886208A2 Data merge unit |
| 12/23/1998 | EP0886207A2 Longest coincidence data detection using associative memory units having interleaved data |
| 12/23/1998 | EP0886205A2 Multi-path data processing pipeline |
| 12/23/1998 | EP0885486A1 Threshold logic with improved signal-to-noise ratio |
| 12/23/1998 | EP0885431A1 Method for processing leaf items, specially bank notes |
| 12/23/1998 | EP0511204B1 Handling system for information carriers |
| 12/23/1998 | CN1202651A Method of operation of arithmetic and logic unit, storage medium, and arithmetic and logic unit |
| 12/22/1998 | US5852826 Parallel merge sort method and apparatus |
| 12/22/1998 | US5852742 Configurable data processing pipeline |
| 12/22/1998 | US5852726 Method and apparatus for executing two types of instructions that specify registers of a shared logical register file in a stack and a non-stack referenced manner |
| 12/22/1998 | US5852568 System and method for a fast carry/sum select adder |
| 12/22/1998 | US5852416 High speed arithmetic logic circuit |
| 12/17/1998 | WO1998057254A1 Tagging floating point values for rapid detection of special floatint point numbers |
| 12/16/1998 | EP0884676A2 Data processing system for dynamically utilizing resources |
| 12/16/1998 | EP0884674A2 Arithmetic and logic unit with accumulator and parallel register |
| 12/16/1998 | EP0884673A2 Method and system for determining Min/Max values |
| 12/15/1998 | US5850452 Method for numerically scrambling data and its application to a programmable circuit |
| 12/15/1998 | US5850451 Enhanced cryptographic system and method with key escrow feature |
| 12/15/1998 | US5850450 Method and apparatus for encryption key creation |
| 12/15/1998 | US5850347 Calculating 2A+ sign(A) in a single instruction cycle |
| 12/15/1998 | US5848593 System for dispensing a kit of associated medical items |
| 12/10/1998 | WO1998056005A2 Method and device for data sequence manipulation |
| 12/10/1998 | WO1998055929A1 Creating a perfect hash using offset table |
| 12/10/1998 | WO1998055917A1 Arithmetic device |
| 12/09/1998 | CN1201185A Method for processing computer having continuously checking function |
| 12/09/1998 | CN1201182A Method for providing pure carry save input for multiplier |
| 12/08/1998 | US5848263 File conversion method and apparatus for LSI design data |
| 12/08/1998 | US5847984 Combination propagate and generate carry lookahead gate |
| 12/08/1998 | US5847983 Full subtracter |
| 12/08/1998 | US5847981 Multiply and accumulate circuit |
| 12/08/1998 | US5847980 Product-summing arithmetic circuit |
| 12/08/1998 | US5847979 Method and apparatus for generating an initial estimate for a floating point reciprocal of a square root |
| 12/08/1998 | US5847978 Processor and control method for performing proper saturation operation |
| 12/08/1998 | US5847708 Method and apparatus for sorting information |
| 12/08/1998 | US5847677 Random number generator for jittered pulse repetition interval radar systems |
| 12/08/1998 | US5847669 Semiconductor device and signal processing system using the same |
| 12/03/1998 | DE19824227A1 Product-sum-arithmetic circuit for multimedia |
| 12/03/1998 | DE19757891A1 Arithmetic processor for summing to two products |
| 12/02/1998 | EP0880737A1 Method of modifying the instruction set of a smart card |
| 12/02/1998 | CN1200822A Set of instructions for operating on packed data |
| 12/02/1998 | CN1200821A Apparatus for performing multiply-add operations on packed data |
| 12/01/1998 | US5845113 Method for external sorting in shared-nothing parallel architectures |
| 12/01/1998 | US5845109 Operation unit and method for controlling processing speed of the same |
| 12/01/1998 | US5844830 Executing computer instrucrions by circuits having different latencies |
| 12/01/1998 | US5844828 Shift circuit and system having the same |
| 12/01/1998 | US5844827 Arithmetic shifter that performs multiply/divide by two to the nth power for positive and negative N |
| 12/01/1998 | US5844826 Leading zero count circuit |
| 12/01/1998 | US5844825 For shifting an inputted data word |
| 11/25/1998 | EP0463966B1 High-performance multi-processor having floating point unit and operation method |
| 11/25/1998 | CN1200184A Complex signal limiting |
| 11/25/1998 | CN1199891A Arithmetic operation device |
| 11/24/1998 | US5842207 Method for storing records of a distributed database by plural processors to provide a host processor with sorted records belonging to one of a plurality of key sections |
| 11/24/1998 | US5842033 Padding apparatus for passing an arbitrary number of bits through a buffer in a pipeline system |
| 11/24/1998 | US5842031 Advanced parallel array processor (APAP) |
| 11/24/1998 | US5842006 Counter circuit with multiple registers for seamless signal switching |
| 11/24/1998 | US5841998 System and method of processing instructions for a processor |
| 11/24/1998 | US5841873 In a data communications system |
| 11/24/1998 | US5841865 Enhanced cryptographic system and method with key escrow feature |
| 11/24/1998 | US5841685 Semiconductor device, and operating device, signal converter, and signal processing system using the semiconductor device |
| 11/24/1998 | US5841684 Method and apparatus for computer implemented constant multiplication with multipliers having repeated patterns including shifting of replicas and patterns having at least two digit positions with non-zero values |
| 11/24/1998 | US5841683 Least significant bit and guard bit extractor |
| 11/24/1998 | US5841679 Vector computation device and vector computation method |
| 11/24/1998 | US5841674 Circuit design methods and tools |
| 11/19/1998 | WO1998052319A1 Improved method and apparatus for protecting public key schemes from timing and fault attacks |
| 11/19/1998 | WO1998032071A3 Processor with reconfigurable arithmetic data path |
| 11/18/1998 | EP0878939A1 ATM cell spacer |
| 11/18/1998 | EP0878758A1 Device for sorting data elements in a binary tree and ATM spacer including such a device |
| 11/18/1998 | EP0878054A1 Energy economized pass-transistor logic circuit and full adder using the same |
| 11/18/1998 | EP0877979A1 Co-processor for performing modular multiplication |
| 11/17/1998 | US5838904 Random number generating apparatus for an interface unit of a carrier sense with multiple access and collision detect (CSMA/CD) ethernet data network |