Patents
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
01/1997
01/08/1997EP0752643A1 Expansion of data
01/08/1997EP0752130A1 Multiplier with reduced run time
01/08/1997CN1139841A High-quality dynamic comparison circuit and reading amplifier circuit
01/08/1997CN1139839A One bit signal processor with amplitude modulation property or instrument of recording or rendition for loading on said signal processor
01/08/1997CN1139777A Processor and operational method and data processor
01/07/1997US5592649 RAM control method and apparatus for presetting RAM access modes
01/07/1997US5592639 Device and method for writing in a storage device of the queue type
01/07/1997US5592587 Shaped digital noise signal generator and method
01/07/1997US5592404 For use with a buffer obtaining data in the form of codewords
01/07/1997US5592142 High speed greater than or equal to compare circuit
01/02/1997EP0751457A1 Basic cell for comparing a first and a second digital signal to each other and relating digital comparator
01/02/1997EP0751456A1 Efficient selection and mixing of multiple sub-word items packed into two or more computer words
01/02/1997EP0750765A1 Data processor for selecting data elements having the highest magitude values and storing them in ascending order
01/02/1997DE19523293A1 Generating nonlinear bell-shaped transfer functions for neural networks using stochastic processes
12/1996
12/31/1996US5590365 Pipeline information processing circuit for floating point operations
12/31/1996US5590362 Database engine predicate evaluator
12/31/1996US5590350 Data processing apparatus
12/31/1996US5590348 Computer system
12/31/1996US5590345 Advanced parallel array processor(APAP)
12/31/1996US5590159 Digital data sequence pattern filtering
12/31/1996US5590138 Encoding and decoding apparatus
12/27/1996WO1996042155A1 Method of encrypting data packets and detecting decryption errors
12/27/1996WO1996042051A1 Circuit for making a binary multiplier cell
12/27/1996WO1996042050A1 Circuit for comparing two electrical quantities provided by a first neuron mos field effect transistor and a reference source
12/27/1996WO1996042049A1 Circuit for comparing two electrical quantities
12/27/1996WO1996042048A1 Circuit for producing logic elements representable by threshold equations
12/27/1996WO1996034473A3 A multi-purpose high speed cryptographically secure sequence generator based on zeta one-way functions
12/27/1996EP0750316A2 Feedback and shift unit
12/27/1996EP0750252A2 Device for comparing two binary coded data with at least 2-bit wide memories
12/25/1996CN1138927A Cryptographic system and method with key escrow feature
12/25/1996CN1138717A High speed dynamic binary incrementer
12/24/1996US5588152 Advanced parallel processor including advanced support hardware
12/24/1996US5587940 Non-heuristic decimal divide method and apparatus
12/24/1996US5587921 Array of configurable logic blocks each including a look up table having inputs coupled to a first multiplexer and having outputs coupled to a second multiplexer
12/24/1996US5587708 Division technique unified quantizer-dequantizer
12/24/1996US5587668 Semiconductor devices utilizing neuron MOS transistors
12/24/1996CA2065034C Segmented memory transfer and message priority on a synchronous/asynchronous data bus
12/19/1996WO1996041468A1 Method and apparatus for copy protection for various recording media using a video finger print
12/19/1996DE19528210C1 Arithmetic semiconductor module with input value limitation
12/18/1996EP0749072A2 Routing arbitration for shared resources
12/18/1996EP0749066A1 Parallel processor apparatus
12/18/1996EP0393087B1 A bit string compressor with boolean operation processing capability
12/17/1996US5586288 Memory interface chip with rapid search capability
12/17/1996US5586275 Devices and systems with parallel logic unit operable on data memory locations, and methods
12/17/1996US5586071 Enhanced fast multiplier
12/17/1996US5586070 Structure and method for embedding two small multipliers in a larger multiplier
12/17/1996US5586069 Arithmetic logic unit with zero sum prediction
12/17/1996US5586044 Array of configurable logic blocks including cascadable lookup tables
12/17/1996US5585716 Multiple stage frequency modulated circuit
12/12/1996WO1996039765A1 Multi-step digital signature method and system
12/12/1996CA2223305A1 Multi-step digital signature method and system
12/10/1996US5584000 Addressing scheme for microcode store in a signal processor
12/10/1996US5583806 Optimized binary adder for concurrently generating effective and intermediate addresses
12/10/1996US5583805 Floating-point processor having post-writeback spill stage
12/10/1996US5583804 Data processing using multiply-accumulate instructions
12/10/1996US5583767 Devices and systems with parallel logic unit, and methods notice
12/10/1996US5583453 Incrementor/decrementor
12/08/1996CA2177782A1 Routing arbitration for shared resources
12/05/1996WO1996038780A2 Method for performing signed division
12/05/1996WO1996038779A1 Accumulator circuit and method of use thereof
12/04/1996EP0746106A2 Programmable array I/O - routing resource
12/04/1996EP0746104A1 Programmable array interconnect network
12/04/1996EP0745945A2 Parametric curve generating device
12/04/1996EP0745931A1 Decimal arithmetic apparatus and method
12/04/1996CN1137212A Treating stage capable of reconfigurating
12/04/1996CN1137131A Integer multiply operation method and apparatus capable of saving storage space
12/03/1996US5581616 Method and apparatus for digital signature authentication
12/03/1996US5581497 Carry skip adder with enhanced grouping scheme
12/03/1996US5581496 Zero-flag generator for adder
11/1996
11/28/1996WO1996037828A1 Apparatus and method for executing pop instructions
11/28/1996WO1996037827A1 EXECUTION UNIT ARCHITECTECTURE TO SUPPORT x86 INSTRUCTION SET AND x86 SEGMENTED ADDRESSING
11/28/1996WO1996037824A1 Incrementor/decrementor
11/28/1996WO1996037823A1 Bit searching through 8, 16, or 32 bit operands using a 32 bit data path
11/28/1996WO1996037822A1 Area and time efficient field extraction circuit
11/28/1996WO1996037821A1 Non-arithmetical circular buffer cell availability status indicator circuit
11/28/1996DE19545900A1 Multiplier for selective multiplication of signed and unsigned magnitudes
11/27/1996EP0744835A2 Improved programmable gate array
11/27/1996EP0744704A2 Logic synthesis method, semiconductor integrated circuit and arithmetic circuit
11/27/1996EP0744688A1 High radix multiplier architecture
11/27/1996EP0744687A1 Combinational logic circuit
11/27/1996EP0744686A1 Manipulation of data
11/27/1996EP0744054A1 High speed function generating apparatus and method
11/27/1996EP0328637B1 Apparatus for computing multiplicative inverses in data encoding decoding devices
11/27/1996CN1136680A Multiplier to selectively perform unsigned magnitude multiplication or signed magnitude multiplication
11/26/1996US5579514 Methodology for increasing the average run length produced by replacement selection strategy in a system consisting of multiple, independent memory buffers
11/26/1996US5579497 Devices and systems with parallel logic unit, and methods
11/26/1996US5579419 Image storing/retrieving apparatus using a mark sheet to enable user selection of images
11/26/1996US5579254 Fast static CMOS adder
11/26/1996US5579253 Computer multiply instruction with a subresult selection option
11/26/1996US5579218 Devices and systems with parallel logic unit, and methods
11/26/1996US5579004 Digital interpolation circuit for a digital-to-analog converter circuit
11/25/1996CA2176786A1 Pseudo random noise sequence code generator and cdma radio communication terminal
11/21/1996WO1996037064A1 Process for the computer-controlled exchange of cryptographic keys between a first and a second computer unit
11/20/1996EP0743774A2 Strengthened public key protocol
11/20/1996EP0743594A1 Matrix transposition
11/20/1996EP0743593A1 Replication of data
11/20/1996EP0743592A1 Manipulation of data
11/19/1996US5577124 Multi-purpose high speed cryptographically secure sequence generator based on zeta-one-way functions
11/19/1996US5576982 Fast significant bit calculator and its application to integer multiplication and division
11/19/1996US5576618 Process and apparatus for comparing in real time phase differences between phasors