| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 05/23/1990 | EP0369188A2 Communications, information, maintenance diagnostic and training system |
| 05/23/1990 | EP0369022A1 Parallel signal processing system |
| 05/23/1990 | DE3937807A1 Data exchange between two transmitting and receiving stations - involves directional transmission and reception signals conveyed by acknowledgement line and starting line between microprocessor interfaces |
| 05/23/1990 | CN1042432A Microcomputer output image transformer |
| 05/22/1990 | US4928234 Data processor system and method |
| 05/22/1990 | US4928022 Redundancy interconnection circuitry |
| 05/22/1990 | CA1269437A1 Circuit arrangement for pcm telecommunication facilities |
| 05/17/1990 | WO1990005342A1 System and method for sharing resources of a host computer among a plurality of remote computers |
| 05/17/1990 | WO1990005339A1 Control for a rotating media storage system |
| 05/17/1990 | WO1990005331A1 Remote linkable computer bus |
| 05/17/1990 | DE3938018A1 Information processing system and configuration determination method - using adaptor identifiers enabling more than one of each adaptor type to be plugged in simultaneously |
| 05/16/1990 | EP0368780A1 Electronic arrangement for picking up signals from a group of external sensors |
| 05/16/1990 | EP0368469A1 Digital communications systems |
| 05/16/1990 | EP0368250A2 Apparatus for transmitting stored information |
| 05/16/1990 | EP0126768B1 A memory cartridge for connection to a telephone switching arrangement |
| 05/16/1990 | CN1008047B The data processing system and its method of application |
| 05/16/1990 | CN1008019B Method and apparatus for occuping control of series trunk wire of non-major control device |
| 05/16/1990 | CA2002537A1 Queue buffer memory control system |
| 05/15/1990 | US4926419 Priority apparatus |
| 05/15/1990 | US4926376 Method of designing integrated microcomputers and integrated microcomputer with modular structure obtained by said method |
| 05/15/1990 | US4926324 I/O control system and method |
| 05/15/1990 | US4926315 Digital data processor with fault tolerant peripheral bus communications |
| 05/15/1990 | US4926313 Bifurcated register priority system |
| 05/15/1990 | CA1269177A1 System for maintaining the hardware-software compatibility of modular communication systems |
| 05/15/1990 | CA1269175A1 Virtual memory computer system |
| 05/09/1990 | EP0367284A2 Reconfigurable output port |
| 05/09/1990 | EP0198922B1 Aircraft data acquisition and recording system |
| 05/09/1990 | CN1007938B Input/output control mode for virtual computer system |
| 05/08/1990 | US4924427 Direct memory access controller with direct memory to memory transfers |
| 05/08/1990 | US4924426 Apparatus with selection circuitry for distributing data blocks from external memory to processing units according to attribute data contained in each data block |
| 05/08/1990 | US4924381 Microprocessor having a dynamic memory refresh circuit |
| 05/08/1990 | US4924380 Dual rotating priority arbitration method for a multiprocessor memory bus |
| 05/08/1990 | US4924375 Page interleaved memory access |
| 05/08/1990 | US4924233 Sensor input/output system with continuous compass interface |
| 05/08/1990 | US4924220 Arbiter circuit for processing concurrent requests for access to shared resources |
| 05/08/1990 | CA1268817A1 Arrangements and methods for testing various electronic equipments |
| 05/03/1990 | DE3935707A1 Bus lead connector coupling computers to peripheral - has priority sequence controller to effect connection between stages |
| 05/03/1990 | DE3926863A1 Control of memory access by multiple processors - using operating system allowing different clock rate processors to communicate |
| 05/02/1990 | EP0366468A2 Connector and interface device |
| 05/02/1990 | EP0366434A2 Quasi-fair arbitration scheme with default owner speedup |
| 05/02/1990 | EP0366433A2 Multiprocessor interlock |
| 05/02/1990 | EP0366432A2 Method and apparatus for bus lock during atomic computer operations |
| 05/02/1990 | EP0366416A2 An input and output processing system for a virtual computer |
| 05/02/1990 | EP0366361A2 Hierarchical multiple bus computer system |
| 05/02/1990 | EP0366341A2 Reliable database administration arrangement |
| 05/02/1990 | EP0366036A2 Memory management in packet data mode systems |
| 05/02/1990 | EP0365745A2 A method for detecting and avoiding erroneous decombining in combining networks for parallel computing systems |
| 05/02/1990 | EP0365731A1 Method and apparatus for transferring messages between source and destination users through a shared memory |
| 05/02/1990 | CA2001471A1 Remote linkable computer bus |
| 05/01/1990 | US4922534 Intelligent synchronous modem and communication system incorporating the same |
| 05/01/1990 | US4922491 Input/output device service alert function |
| 05/01/1990 | US4922457 Serial access memory system provided with improved cascade buffer circuit |
| 05/01/1990 | US4922449 Backplane bus system including a plurality of nodes |
| 05/01/1990 | US4922416 Interface device end message storing with register and interrupt service registers for directing segmented message transfer between intelligent switch and microcomputer |
| 05/01/1990 | US4922414 Symbolic language data processing system |
| 05/01/1990 | US4922410 Input/output system capable of allotting addresses to a plurality of input/output devices |
| 05/01/1990 | US4922409 Bus control device comprising a plurality of isolatable segments |
| 04/30/1990 | CA2000966A1 Electronic arrangement for picking up signals from a group of external sensors |
| 04/25/1990 | EP0365116A2 Buffer memory arrangement |
| 04/25/1990 | EP0365114A2 Interface arrangement for interfacing a data storage device with a data handling system |
| 04/25/1990 | EP0364849A2 Bus for a data processing system |
| 04/25/1990 | EP0364720A1 Technique for implementing byte-wide UART transfers on a 16-bit data bus |
| 04/25/1990 | EP0364558A1 Data communications system and method therefor. |
| 04/25/1990 | CA1268259C Interactive error handling means in database management |
| 04/24/1990 | US4920511 Data port selection |
| 04/24/1990 | US4920486 Distributed arbitration apparatus and method for shared bus |
| 04/24/1990 | US4920485 Method and apparatus for arbitration and serialization in a multiprocessor system |
| 04/24/1990 | US4920484 Multiprocessor/memory interconnection network wherein messages sent through the network to the same memory are combined |
| 04/24/1990 | US4920481 Emulation with display update trapping |
| 04/24/1990 | US4920480 Digital signal processor |
| 04/19/1990 | WO1990004226A1 Computer three-way transfer operation |
| 04/18/1990 | EP0364115A2 Dynamically configurable portable computer system |
| 04/18/1990 | EP0363956A2 Information processing apparatus separably combined with telephone unit |
| 04/18/1990 | EP0363905A2 I/O Apparatus for programmable controller |
| 04/18/1990 | EP0363882A2 Multiprocessor system using communication register having processor-associated storage locations |
| 04/18/1990 | EP0363567A2 A computer with interrupt controlled clock speed and its method of operation |
| 04/18/1990 | EP0067556B1 Digital data processing system |
| 04/18/1990 | CN1041465A Control and data processing apparatus |
| 04/17/1990 | US4918647 Programmable interface unit which generates dedicated control signals in response to a single control word |
| 04/17/1990 | US4918645 Computer bus having page mode memory access |
| 04/17/1990 | US4918599 Interrupt control system |
| 04/17/1990 | US4918598 Method for selectively activating and deactivating devices having same first address and different extended addresses |
| 04/17/1990 | US4918597 Adaptive interface for transferring segmented message between device and microcomputer on line division multiplexed bus |
| 04/17/1990 | US4918329 Data transmission system |
| 04/11/1990 | EP0363173A2 Communication processors for layered protocols |
| 04/11/1990 | EP0363087A2 Status transfer within a data processing system |
| 04/11/1990 | EP0363086A2 Mask programmable bus control gate array |
| 04/11/1990 | EP0362425A1 Input/output controller incorporating address mapped input/output windows and read ahead/write behind capabilities |
| 04/11/1990 | CN1041232A Arithmetic operater and arithmetic operation circuit |
| 04/10/1990 | US4916660 Nest level judging hardware device for high speed message handling systems |
| 04/10/1990 | US4916609 Data processing system for processing units having different throughputs |
| 04/04/1990 | EP0362050A2 Memory card |
| 04/04/1990 | EP0360921A1 Method to control the data transfer of a connection control circuit for central units, and circuitry to carry out this method |
| 04/04/1990 | EP0360917A1 Method and circuit arrangement for controlling a serial interface circuit |
| 04/03/1990 | US4914653 Inter-processor communication protocol |
| 04/03/1990 | US4914625 Bypass mechanism for daisy chain connected units |
| 04/03/1990 | US4914619 Apparatus and method for interconnecting an application of a transparent services access facility to remote source |
| 04/03/1990 | US4914580 Communication system having interrupts with dynamically adjusted priority levels |
| 04/03/1990 | US4914575 System for transferring data between an interleaved main memory and an I/O device at high speed |
| 04/03/1990 | US4914574 Data transmission apparatus having cascaded data processing modules for daisy chain data transfer |