| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 03/08/1989 | EP0305980A2 Programmable logic and driver circuits |
| 03/08/1989 | EP0305680A2 Main frame control by a distant work station |
| 03/07/1989 | US4811364 Method and apparatus for stabilized data transmission |
| 03/07/1989 | US4811306 DMA control device for the transmission of data between a data transmitter |
| 03/07/1989 | US4811283 Recovery system for queued data transfer synch. loss utilizing error flag and status memories |
| 03/07/1989 | US4811282 Retiming circuit for pulse signals, particularly for microprocessor peripherals |
| 03/07/1989 | US4811280 Dual mode disk controller |
| 03/07/1989 | US4811279 Secondary storage facility employing serial communications between drive and controller |
| 03/07/1989 | US4811278 Secondary storage facility employing serial communications between drive and controller |
| 03/07/1989 | US4811277 Communication interface |
| 03/07/1989 | US4811275 Addressing system for an expandable modular electromechanical memory assembly |
| 03/07/1989 | US4811204 Direct memory access and display system |
| 03/07/1989 | US4811202 Quadruply extended time multiplexed information bus for reducing the `pin out` configuration of a semiconductor chip package |
| 03/07/1989 | US4811014 Circuit arrangement for telecommunications systems, particularly telephone switching systems, comprising information interrogating devices cyclically driving inquiry locations |
| 03/07/1989 | US4810958 Arrangements and methods for testing various electronic equipments |
| 03/07/1989 | CA1250918A1 Serial link communications protocol |
| 03/02/1989 | DE3728108A1 Peripheral circuit for a microprocessor |
| 03/01/1989 | EP0305106A2 Bus error processing system |
| 03/01/1989 | EP0305068A2 Controlling asynchronously operating peripherals |
| 03/01/1989 | EP0304615A2 Data rearrangement processor |
| 03/01/1989 | EP0304540A2 A method of initializing a data processing system |
| 03/01/1989 | EP0304469A1 Computer system providing address modification and accommodating dma and interrupts |
| 02/28/1989 | US4809229 Data processing integrated circuit with improved decoder arrangement |
| 02/28/1989 | US4809218 Apparatus and method for increased system bus utilization in a data processing system |
| 02/28/1989 | US4809165 Apparatus for processing input/output pulses for use in microcomputers |
| 02/28/1989 | US4809164 Processor controlled modifying of tabled input/output priority |
| 02/28/1989 | US4809155 Very high speed line adapter for a communication controller |
| 02/28/1989 | US4808114 I/O unit terminal base with external connection terminals, socket for mounting relays, and connector for cable to CPU |
| 02/28/1989 | CA1250648A1 Variable length packet switching system |
| 02/23/1989 | WO1989001666A1 I/o module control system |
| 02/23/1989 | WO1989001662A1 Computer system providing address modification for use also with dma and interrupts |
| 02/23/1989 | WO1989001656A1 High-speed input/output module and plc apparatus |
| 02/23/1989 | DE3827313A1 Digitales verarbeitungssystem, insbesondere videobildprozessor Digital processing system, especially video image processor |
| 02/23/1989 | DE3726659A1 Circuit arrangement to extend the connection possibilities for peripheral units which work with a central control device |
| 02/22/1989 | EP0304074A2 Communication control device and method in computer system |
| 02/22/1989 | EP0303991A2 Method of packetizing data |
| 02/22/1989 | EP0303856A2 Method and apparatus for maintaining duplex-paired devices by means of a dual copy function |
| 02/22/1989 | EP0303855A2 Identification of data storage devices |
| 02/22/1989 | EP0303783A2 Data processing system with logical processor facitily |
| 02/22/1989 | EP0303752A1 Memory access control device in a mixed data format system |
| 02/22/1989 | EP0303751A1 Interface mechanism for controlling the exchange of information between two devices |
| 02/22/1989 | EP0303661A1 Central processor unit for digital data processing system including write buffer management mechanism. |
| 02/22/1989 | CN1031287A Bus adapter unit for digital data processing system |
| 02/21/1989 | US4807282 Programmable P/C compatible communications card |
| 02/21/1989 | US4807184 Modular multiple processor architecture using distributed cross-point switch |
| 02/21/1989 | US4807183 Programmable interconnection chip for computer system functional modules |
| 02/21/1989 | US4807180 Multiple control system for disk storage and method for realizing same |
| 02/21/1989 | US4807121 Peripheral interface system |
| 02/21/1989 | US4807118 Method for handling slot requests over a network |
| 02/21/1989 | US4807117 Interruption control apparatus |
| 02/21/1989 | US4807116 Interprocessor communication |
| 02/21/1989 | US4807112 Microcomputer with a bus accessible from an external apparatus |
| 02/21/1989 | US4807109 High speed synchronous/asynchronous local bus and data transfer method |
| 02/21/1989 | US4806927 Communication control method |
| 02/15/1989 | EP0303288A2 Peripheral repeater box |
| 02/14/1989 | US4805194 Serial data communication system |
| 02/14/1989 | US4805169 Local area network operating on the multiple bus system |
| 02/14/1989 | US4805137 Bus controller command block processing system |
| 02/14/1989 | US4805134 Electronic system for accessing graphical and textual information |
| 02/14/1989 | US4805119 User terminal for videotex |
| 02/14/1989 | US4805106 Method of and arrangement for ordering of multiprocessor operations in a multiprocessor system with redundant resources |
| 02/14/1989 | US4805098 Write buffer |
| 02/14/1989 | US4805096 Interrupt system |
| 02/14/1989 | US4805094 Multi-channel memory access circuit |
| 02/14/1989 | US4805092 Electronic circuit for extending the addressing capacity of a processor |
| 02/14/1989 | US4805091 Method and apparatus for interconnecting processors in a hyper-dimensional array |
| 02/14/1989 | US4805085 Digital control system for electronic apparatus |
| 02/14/1989 | CA1250053A1 Buffer memory control system |
| 02/13/1989 | EP0204827A4 Communication controller using multiported random access memory. |
| 02/09/1989 | WO1989001204A1 Memory access for a computer system |
| 02/09/1989 | WO1989001202A1 Communication processor for personal computer |
| 02/07/1989 | US4803653 Memory control system |
| 02/07/1989 | US4803623 Universal peripheral controller self-configuring bootloadable ramware |
| 02/07/1989 | US4803622 Programmable I/O sequencer for use in an I/O processor |
| 02/07/1989 | US4803617 Multi-processor using shared buses |
| 02/07/1989 | US4803481 Asynchronous communications system |
| 02/01/1989 | EP0301921A2 Digital processing system |
| 02/01/1989 | EP0301695A2 Data processing system |
| 02/01/1989 | EP0301610A2 Data processing apparatus for connection to a common communication path in a data processing system |
| 02/01/1989 | EP0301582A2 Memory address generation apparatus |
| 02/01/1989 | EP0301501A2 Fault tolerant digital data processor with improved bus protocol |
| 02/01/1989 | EP0301500A2 Fault tolerant digital data processor with improved input/output controller |
| 02/01/1989 | EP0301499A2 Digital data processor with fault tolerant peripheral bus communications |
| 02/01/1989 | EP0301498A2 Fault tolerant digital data processor with improved communications monitoring |
| 02/01/1989 | EP0301497A2 Fault tolerant digital data processor with improved peripheral device interface |
| 02/01/1989 | CN1030834A Bus transmitter having controlled trapezoidal slew rate |
| 01/31/1989 | US4802162 Automatic protocol synthesizing system |
| 01/31/1989 | US4802125 Memory access control apparatus |
| 01/31/1989 | US4802087 Multiprocessor level change synchronization apparatus |
| 01/31/1989 | US4802085 Apparatus and method for detecting and handling memory-mapped I/O by a pipelined microprocessor |
| 01/31/1989 | US4800914 Gas pressure relief apparatus |
| 01/25/1989 | EP0300516A2 Digital data processing system |
| 01/25/1989 | EP0300228A1 Method and arrangement for controlling data and/ or information transfer between units connected to a common bus, particularly in data processing installations |
| 01/24/1989 | US4800523 Device interface controller having device specific and device common instructions separately stored |
| 01/24/1989 | US4800484 Computing installation with automatic terminal switching and a terminal adapted to such switching |
| 01/24/1989 | US4800483 Method and system for concurrent data transfer disk cache system |
| 01/24/1989 | US4800462 Electrical keying for replaceable modules |
| 01/24/1989 | US4800384 Arrangement for identifying peripheral apparatus such as work stations printers and such like, which can optionally be connected in geographically different locations to a communication network by means of local coupling units |
| 01/24/1989 | CA1249375A1 Interactive error handling means in database management |
| 01/24/1989 | CA1249374A1 Dynamic address assignment system |