| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
|---|
| 04/17/1991 | EP0422373A2 Generator of topology independent reference signals |
| 04/17/1991 | CN1012409B Bus transmitter having controlled trapezoidal slew rate |
| 04/16/1991 | US5008927 Computer and telephone apparatus with user friendly computer interface integrity features |
| 04/16/1991 | US5008904 Synchronizer using clock phase extrapolation |
| 04/16/1991 | US5008880 Data transmission apparatus |
| 04/16/1991 | US5008853 Representation of collaborative multi-user activities relative to shared structured data objects in a networked workstation environment |
| 04/16/1991 | US5008808 Consolidation of commands in a buffered input/output device |
| 04/16/1991 | US5008567 Signal generating circuit free from malfunction based on noise |
| 04/12/1991 | CA2026068A1 Cpu-bus controller |
| 04/12/1991 | CA2022073A1 Apparatus and method for receiving serial communication status data with a dma controller |
| 04/11/1991 | DE4030162A1 Interrupt processing circuit for computer system - has programmable interrupt controllers built into master and slave processors |
| 04/10/1991 | EP0421696A2 Staggered access memory |
| 04/10/1991 | EP0421615A2 Data processing method and apparatus for verifying adapter description file choices |
| 04/10/1991 | EP0421614A2 Computersystem having apparatus for improving the communication efficiency between a host processor and pheripheral devices connected by an SCSI bus |
| 04/10/1991 | EP0421425A2 Memory control system |
| 04/10/1991 | CN1012325B Operation method for altering data processor and device thereof |
| 04/09/1991 | US5007017 Method and apparatus for data communication through composite network |
| 04/09/1991 | US5007013 Bidirectional communication and control network with programmable microcontroller interfacing digital ICS and controlled product |
| 04/09/1991 | US5007012 Fly-by data transfer system |
| 04/09/1991 | US5006982 Data processor |
| 04/09/1991 | US5006981 System bus expansion for coupling multimaster-capable multicomputer systems |
| 04/09/1991 | US5006979 Phase synchronization system |
| 04/06/1991 | WO1991005302A1 A method of controlling access to restricted access data and communication system therefor |
| 04/04/1991 | WO1991004540A1 Multiple facility operating system architecture |
| 04/04/1991 | WO1991004539A1 Flexible module interconnect system |
| 04/04/1991 | WO1991004537A1 Virtual network architecture and loader |
| 04/04/1991 | WO1991004535A1 Memory-module for a memory-managed computer system |
| 04/04/1991 | WO1991004461A1 Integrated data transmission computer and system |
| 04/04/1991 | DE4029980A1 On-line memory system and disc sub-system - has priority access control with buffer storage of data to be handled |
| 04/03/1991 | EP0420779A2 User selectable electronic mail management method |
| 04/03/1991 | EP0420236A2 Arrangement and method of controlling memory access requests in digital data processing system |
| 04/03/1991 | EP0420203A2 Circuit for controlling a bidirectional bus drive |
| 04/03/1991 | EP0419904A2 Method and system for controlling CPU wait time in computer capable of connecting externally provided input/output controller |
| 04/03/1991 | EP0419723A1 Method and interrupt controller for treating i/o operation interrupt requests in a virtual machine system |
| 04/03/1991 | CN1050450A Apparatus and method for asynchronously delivering control elements with pipe interface |
| 04/03/1991 | CN1012295B Dma accese arbitration device of cpu with arbitrate on behalf of attachment having on arbiter |
| 04/03/1991 | CN1012293B Lsi microprocessor chip with backwark pin compatibility |
| 04/02/1991 | US5005151 Interleaved arbitration scheme for interfacing parallel and serial ports to a parallel system port |
| 04/02/1991 | US5005122 Arrangement with cooperating management server node and network service node |
| 04/02/1991 | US5005121 Integrated CPU and DMA with shared executing unit |
| 04/02/1991 | US5004937 Circuit configuration for accelerated charge reversal of the voltage level of a bus line of an integrated circuit |
| 04/02/1991 | CA1282481C Communication system dynamic conferencer circuit |
| 03/29/1991 | CA2026412A1 Solid state disk drive emulation |
| 03/28/1991 | DE4029861A1 Drive and control method e.g. for several common stores - using two CPU(s) with two common stores and each with common store in it |
| 03/27/1991 | EP0419333A2 Microcomputer peripheral device controller |
| 03/27/1991 | EP0419112A2 Serial data transmission |
| 03/27/1991 | EP0419067A2 Computing system having apparatus for conducting serial port extended buffering exploitation using a protocol overide mechanism |
| 03/27/1991 | EP0419066A2 Computer system having apparatus for asynchronously delivering control elements with a pipe interface |
| 03/27/1991 | EP0419064A2 Computer system having apparatus for providing pointing device independent support in an operating environment |
| 03/27/1991 | EP0419004A2 Computer system with program loading apparatus and loading method |
| 03/27/1991 | EP0418776A2 Controller for effecting a serial data communication and system including the same |
| 03/27/1991 | EP0418658A2 Serial interface control system and method therefor |
| 03/27/1991 | EP0418447A1 Device for controlling the enqueuing and dequeuing operations of messages in a memory |
| 03/27/1991 | CN1012224B Apparatus and method for responding to aborted signal exchange between subsystem in data processing system |
| 03/26/1991 | US5003558 Data synchronizing buffers for data processing channels |
| 03/26/1991 | US5003508 Linear nearest neighbor interconnect bus system |
| 03/26/1991 | US5003470 Method for tying and untying path access in a CPU-based, layered communications system |
| 03/26/1991 | US5003467 Node adapted for backplane bus with default control |
| 03/26/1991 | US5003465 Method and apparatus for increasing system throughput via an input/output bus and enhancing address capability of a computer system during DMA read/write operations between a common memory and an input/output device |
| 03/26/1991 | US5003463 Interface controller with first and second buffer storage area for receiving and transmitting data between I/O bus and high speed system bus |
| 03/26/1991 | US5003461 Cluster controller memory arbiter |
| 03/26/1991 | US5003201 Option/sequence selection circuit with sequence selection first |
| 03/26/1991 | CA1282179C Method for buffered serial peripheral interface (spi) in a serial data bus |
| 03/21/1991 | WO1991004538A1 Input/output module having a combination input/output point |
| 03/21/1991 | WO1991003788A1 Parallel i/o network file server architecture |
| 03/21/1991 | WO1991003786A1 Enhanced vmebus protocol utilizing pseudosynchronous handshaking and block mode data transfer |
| 03/21/1991 | CA2066440A1 Vmebus protocol utilizing pseudosynchronous handshaking and block mode data transfer |
| 03/20/1991 | EP0417920A2 Input/output device and a control system incorporating such a device |
| 03/20/1991 | EP0417905A2 System scan path architecture |
| 03/20/1991 | EP0417889A2 Protection method and apparatus for computer system |
| 03/20/1991 | EP0417888A2 Loading method and apparatus for computer system |
| 03/20/1991 | EP0417878A2 Interface control system |
| 03/20/1991 | EP0417748A2 Interrupt control circuit for use in 1-chip microcomputer |
| 03/20/1991 | EP0417707A2 Microcomputer with address registers for dynamic bus control |
| 03/20/1991 | EP0417293A1 Data management system |
| 03/19/1991 | US5001642 Motor vehicles |
| 03/19/1991 | US5001625 Bus structure for overlapped data transfer |
| 03/19/1991 | US5001624 Processor controlled DMA controller for transferring instruction and data from memory to coprocessor |
| 03/19/1991 | CA2024540A1 Microcomputer peripheral device controller |
| 03/13/1991 | EP0416891A2 Apparatus for providing a universal interface to a process control system |
| 03/13/1991 | EP0416807A2 Optical fibre communication link |
| 03/13/1991 | EP0416714A2 Wafer-scale integrated memory circuits |
| 03/13/1991 | EP0416281A2 Data buffer |
| 03/13/1991 | EP0317567A4 Peripheral control circuitry for personal computer |
| 03/13/1991 | CN1049923A Apparatus and method for preventing unauthorized access to bios in personal computer system |
| 03/12/1991 | US4999807 Data input circuit having latch circuit |
| 03/12/1991 | US4999787 Hot extraction and insertion of logic boards in an on-line communication system |
| 03/12/1991 | US4999771 Communications network |
| 03/12/1991 | US4999769 System with plural clocks for bidirectional information exchange between DMA controller and I/O devices via DMA bus |
| 03/12/1991 | US4999768 Data transfer control units each of which comprises processors and dual-part memory |
| 03/12/1991 | US4999766 Managing host to workstation file transfer |
| 03/12/1991 | US4999554 Method of loading control program for numerical control apparatus |
| 03/12/1991 | CA1281434C Serial communications controller |
| 03/12/1991 | CA1281432C Multipoint link data-transmission control system |
| 03/07/1991 | WO1991003022A1 Peripheral i/0 bus and programmable bus interface for computerized data acquisition |
| 03/07/1991 | DE3928429A1 Processor system with driver components - connecting functional components to system bus using switching signals to change drivers between active and inactive states |
| 03/07/1991 | DE3546684C2 Operating communication bus network for processors |
| 03/07/1991 | DE3546683C2 Operating communication bus network for processors |
| 03/07/1991 | DE3546664C2 Operating communication bus network for processors |
| 03/07/1991 | DE3546662C2 Operating communication bus network for processors |