Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
05/1991
05/28/1991US5019964 Device for interfacing data communications
05/28/1991US5019962 Direct memory access controller for a multi-microcomputer system
05/23/1991DE3937621A1 Telephone exchange with distributed processor systems - provides multiple plug-in positions to enable connections to bus systems
05/22/1991EP0428330A2 Computer interface circuit
05/22/1991EP0428329A2 Extended addressing circuitry
05/22/1991EP0428293A2 Computer system
05/22/1991EP0428111A2 Data transfer control method and data processor using the same
05/21/1991US5018098 Data transfer controlling apparatus for direct memory access
05/21/1991US5016876 Video display co-processor for use in a video game
05/21/1991CA2029259A1 Data representation and protocol
05/21/1991CA1284388C Time partitioned bus arrangement
05/21/1991CA1284386C Data processing system with a fast interrupt
05/21/1991CA1284385C System management apparatus for a multiprocessor system
05/18/1991CA2030021A1 System and method for atomic access to an input/output device with direct memory access
05/16/1991WO1991006909A1 Data-transfer process
05/15/1991EP0427703A1 Decentralised access control to a common data bus
05/15/1991EP0427540A2 Interrupt redirection
05/15/1991EP0427539A2 I/O Emulation
05/15/1991EP0427502A2 Programmable logic controllers
05/15/1991EP0427447A2 Karaoke music reproduction device
05/15/1991EP0427407A2 Parallel port with direct memory access capabilities
05/15/1991EP0427137A1 Output stage on a synchronous serial link, particularly for numerical interface card fitting telephone exchange, and telephone exchange fitted with such interface card
05/15/1991EP0427119A2 Disk array controller with parity capabilities
05/15/1991EP0426983A2 Processor - I/O address expansion
05/14/1991US5016221 First-in, first-out (FIFO) memory with variable commit point
05/14/1991US5016167 Resource contention deadlock detection and prevention
05/14/1991US5016165 Direct memory access controlled system
05/14/1991US5016162 Contention revolution in a digital computer system
05/14/1991US5016160 Computer system having efficient data transfer operations
05/14/1991CA2023998A1 Apparatus and method for guaranteeing strobe separation timing
05/08/1991EP0426599A2 Method of clustering nodes in a distributed computer network
05/08/1991EP0426595A2 Method of permitting access of shared resources using user set definition to support affinity and surrogate user relations
05/08/1991EP0426414A2 Computer system capable of permitting replaceable connection of external storage device
05/08/1991EP0426413A2 Multiprocessor arbitration in single processor arbitration schemes
05/08/1991EP0426354A2 Method for channel path load balancing and data processing system employing same
05/08/1991EP0426331A2 Programmable interrupt controller
05/08/1991EP0426329A1 Combined synchronous and asynchronous memory controller
05/08/1991EP0426323A2 Portable, resource sharing file server using co-routines
05/08/1991EP0426183A2 Programmable input/output delay between accesses
05/08/1991EP0426169A2 Optical data filing system with improved memory read/write control
05/08/1991EP0426156A2 Floppy disk controller with DMA verify operations
05/08/1991EP0426134A2 Method and system for holding bus at insert/extract of IC card in computer
05/08/1991EP0426133A2 Personal computer for disabling resume mode upon replacement of HDD
05/08/1991EP0426111A2 Memory control system
05/08/1991EP0426081A2 Programmable controller having interrupt controller for determining priority for interrupt requests from a plurality of I/O devices and generating interrupt vector
05/08/1991EP0425849A2 Data memory access
05/08/1991EP0425843A2 Enhanced locked bus cycle control in a cache memory computer system
05/08/1991EP0425839A2 Data processing system channel
05/08/1991EP0425764A2 Input data control system and data management apparatus for use therewith
05/08/1991EP0425550A1 Memory control unit.
05/08/1991DE3937021A1 Data transfer control between central unit and subscribers - uses divided dual port memory and interface identification memory for connecting of subscribers with different protocols
05/08/1991CN1051254A Personal computer processor card interconnect system
05/07/1991US5014236 Input/output bus expansion interface
05/07/1991US5014194 System for reducing I/O controller overhead by using a peripheral controller for producing read, write, and address translation request signals
05/07/1991US5014193 Dynamically configurable portable computer system
05/07/1991US5014187 Adapting device for accommodating different memory and bus formats
05/07/1991US5014186 Data-processing system having a packet transfer type input/output system
05/07/1991CA1283962C Apparatus and method for communication between host cpu and remote terminal
05/04/1991CA2029198A1 Multiprocessor arbitration in single processor arbitration schemes
05/04/1991CA2028552A1 Bus clock extending memory controller
05/04/1991CA2028378A1 Floppy disk controller with dma verify operations
05/04/1991CA2027947A1 Combined synchronous and asynchronous memory controller
05/04/1991CA2027819A1 Programmable input/output delay between accesses
05/04/1991CA2027809A1 Parallel port with direct memory access capabilities
05/04/1991CA2026816A1 Enhanced locked bus cycle control in a cache memory computer system
05/04/1991CA2026770A1 Multiprocessor interrupt control
05/04/1991CA2026769A1 Disk array controller with parity capabilities
05/04/1991CA2025439A1 Internal cache microprocessor slowdown circuit with minimal system latency
05/02/1991EP0425194A2 Computer system
05/02/1991EP0425192A2 Printed circuit board interconnect apparatus
05/02/1991EP0425181A2 Preference circuit for a computer system
05/02/1991EP0424715A2 Computer system
05/02/1991EP0424658A2 Computer system
05/02/1991DE3936334A1 Datentransfer-verfahren Data transfer process
05/01/1991CN1012537B Mode conversion of computer commands
05/01/1991CA2025752A1 Method and apparatus for communicating an address from a peripheral device to a host computer
05/01/1991CA2021266A1 Input data control system and data management apparatus for use therewith
04/1991
04/30/1991US5012404 Integrated circuit remote terminal stores interface for communication between CPU and serial bus
04/30/1991US5012138 Interface circuit for asychronous data transfer
04/24/1991EP0424205A1 Electrical connecting chain for peripheral information treatment system unities
04/24/1991EP0423730A2 Electronic device with data transmission function
04/24/1991EP0423421A2 Method and system for detecting and recovering from switching errors
04/24/1991EP0169909B1 Auxiliary memory device
04/24/1991CN1050936A Preemption control for central processor with cache
04/24/1991CA2021826A1 Delay logic for preventing cpu lockout from bus ownership
04/23/1991US5010548 Scanner interface for the line adapters of a communication controller
04/23/1991US5010514 Structured fields at a data stream boundary for delimiting files
04/23/1991US5010480 Communication interface for interfacing a data bus of a computer to a high speed bipolar communication system
04/23/1991US5010479 Information processing and storage system with signal transmission loop line
04/23/1991US5010476 Time multiplexed system for tightly coupling pipelined processors to separate shared instruction and data storage units
04/23/1991US5010450 Front-rear modular unit
04/23/1991CA1283484C Method and apparatus for controlled removal and insertion of circuit modules
04/20/1991WO1991006160A1 Telephone access video game distribution center
04/20/1991CA2067783A1 Telephone access video game distribution center
04/18/1991WO1991005379A1 Electric linking chain for peripheral units of data processing system
04/18/1991DE4031662A1 Direct memory access controller for data processor - has external interrupt facility for communication in burst mode
04/18/1991DE4031661A1 Direct memory access monitoring system - has controller providing continuous cycle stealing access via buses
04/17/1991EP0423036A2 CPU-bus controller
04/17/1991EP0422967A2 Dual domain memory controller
04/17/1991EP0422776A2 Serial communication apparatus for receiving serial communication status data with a DMA controller