Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
08/1989
08/16/1989EP0327782A1 Bus controller command block processing system
08/15/1989US4858173 Apparatus and method for responding to an aborted signal exchange between subsystems in a data processing system
08/15/1989US4858117 Apparatus and method for preventing computer access by unauthorized personnel
08/15/1989US4858116 Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
08/15/1989US4858115 Loop control mechanism for scientific processor
08/15/1989US4858114 Emulation system for automatically modifying I/O translation tables in programs designed to run on different types of computer
08/15/1989US4858113 Reconfigurable pipelined processor
08/15/1989US4858112 Interface comprising message and protocol processors for interfacing digital data with a bus network
08/15/1989US4858108 Priority control architecture for input/output operation
08/15/1989US4858107 Computer device display system using conditionally asynchronous memory accessing by video display controller
08/10/1989WO1989007349A1 Universal connector device
08/09/1989EP0327203A2 NxM arbitrating non-blocking high bandwidth switch
08/09/1989EP0327197A2 I/O simulation
08/09/1989EP0327115A1 Serial access memory system provided with improved cascade buffer circuit
08/09/1989EP0327102A2 Apparatus and method for structuring data written according to ISO/8824/ASN.1 specification
08/09/1989EP0327058A2 Protocol data unit encoding/decoding system
08/09/1989EP0326700A2 A trusted path mechanism for virtual terminal environments
08/09/1989EP0326699A2 A remote trusted path mechanism for telnet
08/09/1989EP0326696A2 Hybrid communications link adapter incorporating input/output and data communications technology
08/08/1989US4856091 Radiation-coupled daisy chain
08/08/1989US4855905 Multiprotocol I/O communications controller unit including emulated I/O controllers and tables translation of common commands and device addresses
08/08/1989US4855903 Topologically-distributed-memory multiprocessor computer
08/08/1989US4855902 Microprocessor assisted data block transfer apparatus
08/08/1989US4855901 Apparatus for transferring data between a microprocessor and a memory
08/08/1989US4855899 Multiple I/O bus virtual broadcast of programmed I/O instructions
08/03/1989DE3908786A1 Method for data transfer between boards of an electronic circuit
08/02/1989EP0325856A2 Interface circuit for data transfer between processor and input/output device
08/02/1989EP0201567B1 Flow control between a data terminal and a host computer system
08/01/1989US4853849 Multi-tasking register set mapping system which changes a register set pointer block bit during access instruction
08/01/1989US4853848 Block access system using cache memory
08/01/1989US4853847 Data processor with wait control allowing high speed access
08/01/1989US4853846 Bus expander with logic for virtualizing single cache control into dual channels with separate directories and prefetch for different processors
08/01/1989US4853844 Data processing system adaptable to using equivalent integrated circuits
08/01/1989US4853831 Bus connection structure for interruption control system
07/1989
07/26/1989EP0325080A1 Protocol and apparatus for the selective scanning of a plurality of lines connected to a communication device
07/26/1989EP0325079A1 Device for controlling the channel adapters in a data processing system remotely
07/26/1989EP0325078A1 Mechanism for error detection and reporting on a synchronous bus
07/26/1989EP0325077A1 Scanner interface for the line adapters of a communication controller
07/26/1989EP0205563B1 System for selectively coupling a plurality of data stations into a single communications path
07/25/1989US4852127 Universal protocol data receiver
07/25/1989US4852088 Packet-at-a-time reporting in a data link controller
07/25/1989US4852083 Digital crossbar switch
07/25/1989US4852043 Daisy-chain bus system with truncation circuitry for failsoft bypass of defective sub-bus subsystem
07/25/1989US4852021 Centralized command transfer control system for connecting processors which independently send and receive commands
07/25/1989US4851997 Local area network control apparatus
07/25/1989US4851996 Common resource arbitration circuit having asynchronous access requests and timing signal used as clock input to register and mask signal to priority network
07/25/1989US4851991 Central processor unit for digital data processing system including write buffer management mechanism
07/25/1989US4851990 High performance processor interface between a single chip processor and off chip memory means having a dedicated and shared bus structure
07/19/1989EP0324144A2 Data-processing system with arrangement for identifying interrupt supplying units
07/19/1989EP0324016A1 Memory access for a computer system
07/19/1989CN1034085A Apparatus and method for tracking and identifying printed circuit assemblies
07/18/1989US4849965 Asynchronous digital time-division multiplexing system with distributed bus
07/18/1989US4849931 Data processing system having interfacing circuits assigned to a common I/O port address by utilizing a specific bit line of a common bus
07/18/1989US4849875 Computer address modification system with optional DMA paging
07/13/1989DE3744564A1 Data format converter, and test device which uses groups of such converters for testing devices
07/11/1989US4847867 Serial bus interface system for data communication using two-wire line as clock bus and data bus
07/11/1989US4847830 Method and apparatus for automatic loading of a data set in a node of a communication network
07/11/1989US4847812 FIFO memory device including circuit for generating flag signals
07/11/1989US4847809 Image memory having standard dynamic RAM chips
07/11/1989US4847765 Hybrid interrupt handling for computer-controlled imaging system
07/11/1989US4847757 Interleaved access to global memory by high priority source
07/11/1989US4847756 Data transmission system for a computer controlled copying machine having master and slave CPU's
07/11/1989US4847752 Data processing apparatus having an input/output controller for controlling interruptions
07/11/1989US4847750 Peripheral DMA controller for data acquisition system
07/11/1989CA1257400A1 Input/output control system
07/11/1989CA1257399A1 Local area network for digital data processing system
07/05/1989EP0323080A2 Multiprocessor memory access control system
07/05/1989CN1004729B Microprocessor system
07/04/1989US4845752 Multi-signal processor synchronized system
07/04/1989US4845722 Computer interconnect coupler employing crossbar switching
07/04/1989US4845712 State machine checker
07/04/1989US4845662 Data processor employing run-length coding
07/04/1989US4845657 Controller integrated circuit
07/04/1989US4845614 Microprocessor for retrying data transfer
07/04/1989US4845611 Device for connecting 8-bit and 16-bit modules to a 16-bit microprocessor system
07/04/1989US4845609 Computer communications subsystem using an embedded token-passing network
07/04/1989US4845522 Data communication system for camera system
07/04/1989US4845467 Keyboard having microcomputerized encoder
07/04/1989US4845437 Synchronous clock frequency conversion circuit
07/04/1989US4845347 Transaction system
06/1989
06/29/1989WO1989006011A1 Managing interlocking
06/29/1989DE3743387A1 Method and arrangement for data transmission between a virtual memory unit and a bus unit
06/28/1989EP0322272A1 Transmission system between several units of a motor vehicle and a central processing unit
06/28/1989EP0322116A2 Interconnect system for multiprocessor structure
06/28/1989EP0322105A2 Method of appending a reply in an electronic information system
06/28/1989EP0322066A1 Memory access priority control system and use thereof
06/28/1989EP0322065A1 Graphic system comprising a graphic controller and a DRAM controller
06/28/1989EP0321775A2 Secure data processing system using commodity devices
06/28/1989EP0321723A2 Apparatus for a data processing system having a peer relationship among a plurality of central processing units
06/28/1989EP0321628A1 Shared memory interface for a data processing system
06/28/1989EP0321493A1 A content-addressable memory system
06/27/1989US4843543 Storage control method and apparatus
06/27/1989CA1256614A1 Signal processor communication interface
06/27/1989CA1256583A1 Memory reference control in a multiprocessor
06/27/1989CA1256581A1 Method and apparatus for interconnecting processors in a hyper-dimensional array
06/27/1989CA1256528A1 Inter-subsystem communication system
06/21/1989EP0321240A2 Method and apparatus for interrupt processing
06/21/1989EP0321157A2 Direct memory access apparatus and methods
06/21/1989EP0321156A2 Data transfer controller
06/21/1989CN1033489A Circuit for preventing lock-out of high priority requets to a system controller
1 ... 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 ... 1581