Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
06/1989
06/20/1989US4841475 Data transfer system and method for channels with serial transfer line
06/20/1989US4841440 Control processor for controlling a peripheral unit
06/20/1989US4841435 Data alignment system for random and block transfers of embedded subarrays of an array onto a system bus
06/20/1989US4841295 Local area network with biasing arrangement for facilitating access contention between work stations connected to a common bus
06/20/1989US4841178 Asynchronous processor arbitration circuit
06/15/1989WO1989005551A1 Method and apparatus for automatic loading of a data set in a node of a communication network
06/14/1989EP0320041A2 Multi-access device
06/14/1989EP0319668A2 Inter and intra priority resolution network for an asynchronous bus system
06/14/1989EP0319663A2 Bidirectional control signalling bus interface apparatus for transmitting signals between two bus system
06/13/1989US4839856 Memory access control circuit
06/13/1989US4839802 Adaptation of computer to communication operation
06/13/1989US4839800 Data processing system with a fast interrupt
06/13/1989US4839798 Method and apparatus for controlling job transfer between computer systems
06/13/1989US4839795 Interface circuit for single-chip microprocessor
06/13/1989US4839794 Pseudo-status signal generator
06/13/1989US4839791 Input/output buffer system
06/07/1989EP0319519A2 Computer system accepting feature cards
06/07/1989EP0319232A2 A multi-user data communication system
06/07/1989EP0319185A2 Method and apparatus for checking a state machine
06/07/1989EP0318600A1 Signal output device
06/07/1989CN1004450B Data back-up system for image printer
06/06/1989US4837805 Opening command transmission system and method capable of reducing overhead in an information processing unit
06/06/1989US4837785 Data transfer system and method of operation thereof
06/06/1989US4837736 Backplane bus with default control
06/06/1989US4837688 Multi-channel shared resource processor
06/06/1989US4837682 Bus arbitration system and method
06/06/1989US4837680 Controlling asynchronously operating peripherals
06/06/1989US4837677 Multiple port service expansion adapter for a communications controller
06/06/1989US4837675 Secondary storage facility empolying serial communications between drive and controller
06/06/1989US4837674 Circuit arrangement capable of quickly processing an interrupt in a virtual machine operated by a plurality of operating systems
06/01/1989WO1989005012A1 Memory controller as for a video signal processor
06/01/1989WO1989003566A3 Layered network
05/1989
05/31/1989EP0318221A2 Controlling responding by users of an intercommunications bus
05/31/1989EP0317901A2 Finite metastable time synchronizer
05/31/1989EP0317567A1 Peripheral control circuitry for personal computer
05/31/1989CN2038647U Time sharing communication interface of multi-microprocessor system
05/30/1989US4835737 Method and apparatus for controlled removal and insertion of circuit modules
05/30/1989US4835685 Virtual single machine with message-like hardware interrupts and processor exceptions
05/30/1989US4835673 Method and apparatus for sharing resources among multiple processing systems
05/30/1989US4835672 Access lock apparatus for use with a high performance storage unit of a digital data processing system
05/30/1989US4835346 Method and device for fast data transmission through a standard serial link
05/30/1989EP0187763A4 Data processor having module access control.
05/30/1989CA1255006A1 Data transmission system
05/24/1989EP0317481A2 Remote storage management mechanism and method
05/24/1989EP0317470A2 Lssd edge detection logic for asynchronous data interface
05/24/1989EP0317466A2 Reverse flow control mechanism and method
05/24/1989CN1033119A Virtual input/output commands
05/23/1989US4833672 Multiplex system
05/23/1989US4833605 Cascaded information processing module having operation unit, parallel port, and serial port for concurrent data transfer and data processing
05/23/1989US4833598 I/O interrupt handling mechanism in a multiprocessor system
05/23/1989US4833468 Layered network
05/23/1989US4833466 Pulse code modulation decommutator interfacing system
05/23/1989US4833349 Programmable logic and driver circuits
05/23/1989CA1254664A1 Local area network processing system
05/23/1989CA1254663A1 Multiprocessor system architecture
05/23/1989CA1254620A1 Method and electronic device for the distribution execution of an activity between a plurality of different sites
05/18/1989WO1989004522A1 Data processing system, particularly for domestic use
05/18/1989WO1989004517A1 Protocol for network having a plurality of intelligent cells
05/17/1989EP0316251A2 Direct control facility for multiprocessor network
05/17/1989EP0316138A2 Grouping device for interrupt controller
05/17/1989EP0316020A2 Block counter system to monitor data transfers
05/17/1989EP0315653A1 Remote services console for digital data processing system.
05/16/1989US4831620 Controller for controlling multiple LAN types
05/16/1989US4831581 Central processor unit for digital data processing system including cache management mechanism
05/16/1989US4831541 System for editing real and virtual storage and secondary storage media
05/16/1989US4831523 Multiple DMA controller chip sequencer
05/16/1989US4831520 Bus interface circuit for digital data processor
05/16/1989US4831516 Data transmission system between a main CPU board having a wait signal generating latch and a plurality of CPU boards
05/16/1989US4831514 Method and device for connecting a 16-bit microprocessor to 8-bit modules
05/16/1989US4831358 Communications system employing control line minimization
05/16/1989US4831283 Terminator current driver with short-circuit protection
05/16/1989CA1254304A1 Multicomputer digital processing system
05/10/1989EP0315194A2 Microcomputer capable of accessing continuous addresses for a short time
05/10/1989CN1032873A Data reserve system for mage printer
05/09/1989US4829516 System structure recognition method for a multiloop transmission system
05/09/1989US4829515 High performance low pin count bus interface
05/09/1989US4829475 Method and apparatus for simultaneous address increment and memory write operations
05/09/1989US4829473 Peripheral control circuitry for personal computer
05/09/1989US4829467 Memory controller including a priority order determination circuit
05/09/1989US4829425 Memory-based interagent communication mechanism
05/09/1989US4829297 Communication network polling technique
05/09/1989CA1253972A1 Multicommunication protocol controller
05/09/1989CA1253970A1 Virtual single machine with message-like hardware interrupts and processor exceptions
05/05/1989WO1989004015A1 Multi-master bus system
05/03/1989EP0314501A2 Computer workstation with interrupt signalling arrangement
05/03/1989EP0313668A1 Data transfer device
05/03/1989EP0133577B1 Data transmission system in a digital transmission network and arrangement for the use of this system
05/03/1989DE3835125A1 8-bit-steuereinrichtung fuer direkten zugriff 8-bit control device for direct access
05/02/1989US4827471 Method for bus access for data transmission through a multiprocessor bus
05/02/1989US4827409 High speed interconnect unit for digital data processing system
05/02/1989US4827407 Vector processing system
05/02/1989US4827398 Process for interconnecting microprocessors
05/02/1989CA1253625A1 Personal computer note-taking facility
05/02/1989CA1253624A1 System structure recognition method for a multiloop transmission system
04/1989
04/26/1989EP0313064A2 Bus data path control scheme
04/26/1989EP0312739A2 Apparatus and method for interconnecting an application of a transparent services access facility to a remote source
04/26/1989EP0312615A1 Method and apparatus for data transfer
04/26/1989EP0312614A1 Data transfer system
04/26/1989EP0312573A1 Backplane bus.
04/25/1989US4825438 Bus error detection employing parity verification