Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
03/1991
03/07/1991CA2039150A1 Peripheral i/o bus and programmable bus interface for computerized data acquisition
03/06/1991EP0415551A2 Protocol for transfer of DMA data
03/06/1991EP0414818A1 Computer system with distributed associative memory
03/06/1991CN1049731A Apparatus and method for decreasing the memory requirements for bios in a personal computer system
03/06/1991CN1049730A Apparatus and method for loading bios from a diskette in a personal computer system
03/05/1991US4998262 Generation of topology independent reference signals
03/05/1991US4998198 Dynamic burst control for data transfers
03/05/1991US4998180 Bus device with closely spaced double sided daughter board
03/05/1991US4998027 Arbiter circuit
03/05/1991CA1281095C Multipurpose digital integrated circuit for communication and control network
02/1991
02/28/1991DE4026135A1 Input and output control system for overall processing system - uses cache memory between processing and rotating storage unit for reduced I=O processing times
02/27/1991EP0414624A2 System for calling procedures on a remote network node
02/27/1991EP0414546A2 Backpanel having multiple logic family signal layers
02/27/1991EP0414354A1 Low-voltage CMOS output buffer
02/27/1991EP0413873A1 Fast scheduler allowing transient computing overloads
02/27/1991EP0235199B1 Communication protocol selection for data processing system
02/27/1991EP0185093B1 Data transfer equipment
02/27/1991EP0139759B1 System for connecting and controlling external devices
02/26/1991US4996706 Method of controlling the electric power supplied to a modem
02/26/1991CA1280828C Method for the selection of a common memory of a multi-processor system composed of individual microprocessor systems with collision avoidance
02/26/1991CA1280827C Operator interface servicing module
02/24/1991WO1991003020A1 Data processing system and process for controlling it and cpu boards
02/24/1991CA2039715A1 Data processing system and process for controlling it and cpu boards
02/23/1991CA2011933A1 Backpanel having multiple logic family signal layers
02/21/1991WO1991002313A1 Data processing network
02/21/1991WO1991002305A1 Workstations and data processing network containing workstations
02/21/1991DE4025975A1 Control circuit for generating acknowledgement and busy signals - is used in centronics-compatible parallel interface and reacts to strobe signal and end of received data processing
02/20/1991EP0413651A2 Method for dynamic self-modification of data stream constructs
02/20/1991EP0413074A1 Managing host to workstation file transfer
02/20/1991CN1049420A Dual domain memory controller
02/19/1991US4995056 System and method for data communications
02/19/1991US4994998 Apparatus and method for structuring data written according to ISO/8824/ASN.1 specification
02/19/1991US4994963 System and method for sharing resources of a host computer among a plurality of remote computers
02/19/1991US4994960 Interrupt system for transmitting interrupt request signal and interrupt vector based upon output of synchronized counters representing selected priority value
02/19/1991US4994737 System for facilitating planar probe measurements of high-speed interconnect structures
02/19/1991US4994690 Split level bus
02/15/1991WO1991003017A1 Logical event notification method and apparatus
02/14/1991DE3926165A1 Transmitter-receiver arrangement as microprocessor interface - has control logic and register for programmed operation from coupled microprocessor
02/13/1991EP0412666A2 A read/write memory
02/13/1991EP0412269A2 Channel and extender unit operable with byte mode or non-byte mode control units
02/13/1991EP0412268A2 Apparatus for interconnecting a control unit having a parallel bus with a channel having a serial link
02/13/1991EP0412267A2 Asynchronous high-speed data interface
02/13/1991EP0412232A2 Apparatus and method for providing high performance communication between software processes
02/12/1991US4992976 Method of allocating board slot numbers with altering software
02/12/1991US4992973 Data transmission apparatus with loopback topology
02/12/1991US4992678 High speed computer data transfer system
02/12/1991CA2020456A1 Dual domain memory controller
02/12/1991CA1280216C Time slot protocol in the transmission of data in a data processing network
02/09/1991WO1991002312A1 Modular input/output system for supercomputers
02/09/1991CA2064746A1 Modular input/output system for supercomputers
02/07/1991WO1990016025A3 Data store connection
02/07/1991DE4016949A1 Coupling and decoupling multiple master buses - using bus command contg. variable association signals esp. for spatially distributed systems with identical bus protocols
02/07/1991DE4016782A1 Coupling multiple master busses esp. for spatially distributed systems - using bus clock edge-related transfer of coupling set=up messages
02/07/1991DE3925723A1 V-24 bus interface with open collector RTS and TXD stages - enables simultaneous connection of multiple peripherals to computer with standard V-24 interface
02/06/1991EP0411806A2 Computer system with modular upgrade capability
02/06/1991EP0411759A2 Synchronizer using clock phase extrapolation
02/06/1991EP0411553A2 Data communication system
02/06/1991CN1011556B Bidirectional buffer with latch and parity capability
02/05/1991US4991170 Circuit for interfacing a digital signal processor to a serial interface controller
02/05/1991US4991133 Specialized communications processor for layered protocols
02/05/1991US4991112 Graphics system with graphics controller and DRAM controller
02/05/1991US4991085 Personal computer bus interface chip with multi-function address relocation pins
02/05/1991US4991084 N×M round robin order arbitrating switching matrix system
02/05/1991US4990907 Method and apparatus for data transfer
02/05/1991CA1279933C2 Local area network for digital data processing system
02/02/1991CA2022250A1 Protocol for transfer of dma data
01/1991
01/31/1991DE4022365A1 Data communications system with two=part address and data buses - enables direct I=O transfer during instruction fetching to eliminate microprocessor delays
01/30/1991EP0410861A1 Architecture of a computer system comprising two buses
01/30/1991EP0410860A1 Interface for connecting a computer bus to a fibre-optic ring network
01/30/1991EP0410566A2 Data processing system with means to convert burst operations into pipelined operations
01/30/1991EP0410435A2 Simplified synchronous mesh processor
01/30/1991EP0410382A2 Data transfer controller using direct memory access method
01/30/1991EP0410314A2 Intelligent network interface circuit
01/30/1991EP0409841A1 Switching system
01/30/1991CN1048938A Command delivery for a computing system
01/30/1991CN1011470B Processor apparatus with improved control of electromagnetic radiation
01/29/1991US4989140 Single chip pipeline data processor using instruction and operand cache memories for parallel operation of instruction control and executions unit
01/29/1991US4989139 Map case network virtual connection interface system
01/29/1991US4989136 Computer system
01/29/1991US4989135 Communication control microcomputer
01/29/1991US4989113 Microcomputer
01/29/1991CA2021192A1 Simplified synchronous mesh processor
01/29/1991CA1279728C Method for serial data peripheral interface (spi) in a serial data bus
01/23/1991EP0409604A2 Processing method by which continuous operation of communication control program is obtained
01/23/1991EP0409434A1 Method and device for controlling communication between computers
01/23/1991EP0409330A2 Memory access control circuit
01/23/1991EP0409285A2 Method and apparatus for data transfer between processor elements
01/23/1991EP0408794A1 Peripheral module, particularly in an automation apparatus with a decentralized programme control
01/23/1991CN1011356B Bus interface circuit for digital data processor
01/22/1991US4987578 Mask programmable bus control gate array
01/22/1991US4987535 Interruption control circuit
01/22/1991US4987530 Input/output controller for a data processing system
01/22/1991US4987529 Shared memory bus system for arbitrating access control among contending memory refresh circuits, peripheral controllers, and bus masters
01/21/1991CA2021469A1 Input/output module within a programmable controller with distributed program control
01/16/1991EP0408293A2 Method for high speed data transfer
01/16/1991EP0407669A2 Computer system with simplified master requirements
01/15/1991USRE33521 Method and apparatus for detecting a faulty computer in a multicomputer system
01/15/1991US4985830 Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system
01/15/1991CA1279118C Bus structure having constant electrical characteristics
01/10/1991WO1991000573A1 Interfacing system between a computer and a cards system for checking industrial working proceedings