| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 02/01/1990 | DE3923759A1 Prozessor Processor |
| 02/01/1990 | DE3824306A1 Microprocessor with serial data bus and signal line(s) to determine the data length |
| 01/31/1990 | EP0352965A2 Data transmission system |
| 01/31/1990 | EP0352934A2 Insertion and removal of a circuit device into a bus network |
| 01/31/1990 | EP0352745A2 Microprocessor |
| 01/30/1990 | US4897833 Computer interconnect coupler for transmitting messages |
| 01/30/1990 | US4897810 Asynchronous interrupt status bit circuit |
| 01/30/1990 | US4897786 Bus window interlock |
| 01/30/1990 | US4897784 Multi-level bus access for multiple central processing unit |
| 01/30/1990 | US4897779 Method and apparatus for optimizing inter-processor instruction transfers |
| 01/30/1990 | CA1265255A1 Application specific integrated circuit |
| 01/24/1990 | EP0352081A2 Efficient protocol for communicating between asynchronous devices |
| 01/24/1990 | EP0352080A2 Method and apparatus for optimizing inter-processor instruction transfers |
| 01/24/1990 | EP0352028A2 Apparatus for transmitting data between a central processor and remote peripheral devices |
| 01/24/1990 | EP0351984A2 Programmable interface for computer system peripheral circuit card |
| 01/24/1990 | EP0351961A2 Automatic reconfiguring apparatus |
| 01/24/1990 | EP0351959A2 Multi-channel controller |
| 01/24/1990 | EP0351425A1 Data processing system, particularly for domestic use |
| 01/24/1990 | EP0203993B1 Queue administration method and apparatus |
| 01/23/1990 | US4896266 Bus activity sequence controller |
| 01/23/1990 | US4896262 Emulation device for converting magnetic disc memory mode signal from computer into semiconductor memory access mode signal for semiconductor memory |
| 01/23/1990 | US4896261 System for scheduling serial message transmission on a bus which is adoptable for rescheduling prioritized messages using a doubly-linked list |
| 01/23/1990 | US4896260 Data processor having integrated circuit memory refresh |
| 01/23/1990 | US4896256 Linking interface system using plural controllable bidirectional bus ports for intercommunication amoung split-bus intracommunication subsystems |
| 01/23/1990 | CA1264877A1 Communications network |
| 01/23/1990 | CA1264862A1 Microcomputer system with independent operating systems |
| 01/17/1990 | EP0351212A2 Counter circuit presettable with a plurality of count values |
| 01/17/1990 | EP0351157A2 Semiconductor integrated circuits |
| 01/17/1990 | EP0350674A2 Method for hot extraction and insertion of logic boards in an on-line communication system and apparatus therefor |
| 01/17/1990 | EP0350573A1 Multiple computer interface circuit board |
| 01/17/1990 | EP0168307B1 Microprocessor with a stop function of the event counter |
| 01/16/1990 | US4894769 Increased bandwith for multi-processor access of a common resource |
| 01/16/1990 | US4894565 Asynchronous digital arbiter |
| 01/16/1990 | CA1264493A1 Digital computer with parallel processors |
| 01/11/1990 | WO1990000284A1 Memory control unit |
| 01/11/1990 | WO1990000282A1 System bus having multiplexed command/id and data |
| 01/11/1990 | WO1990000278A1 Consolidation of commands in a buffered input/output device |
| 01/11/1990 | WO1990000276A1 I/o bus to system bus interface |
| 01/10/1990 | EP0349905A1 Priority selection device |
| 01/10/1990 | CN1038739A High performance memory imaging network for a real time process control system |
| 01/03/1990 | EP0349465A2 Real time compilation of dynamically generated variable data for use in structured data streams |
| 01/03/1990 | EP0349462A2 Method of document definition utilizing a list directed expression architecture |
| 01/03/1990 | EP0349457A2 Dynamic redefinition of a shell structure |
| 01/03/1990 | EP0349427A1 Electronic interface device between a shared memory and a plurality of users |
| 01/03/1990 | EP0349371A1 Computer system having a central interconnection |
| 01/03/1990 | EP0348672A2 A data processing system bus architecture |
| 01/03/1990 | EP0348654A2 Method and apparatus for increasing system throughput |
| 01/03/1990 | EP0177616B1 System for selecting address in input/output board |
| 01/02/1990 | US4891804 Data switching arrangement |
| 01/02/1990 | US4891752 Multimode expanded memory space addressing system using independently generated DMA channel selection and DMA page address signals |
| 12/28/1989 | EP0269676A4 Universal programmable counter/timer and address register module. |
| 12/27/1989 | EP0348148A2 SCSI converter |
| 12/27/1989 | EP0348113A2 Programmable burst apparatus and technique |
| 12/27/1989 | EP0348076A1 Data processing device |
| 12/27/1989 | EP0348045A2 Method of controlling the operating speed of an information processing unit, and related information processing unit |
| 12/27/1989 | EP0347929A2 Parallel processor |
| 12/27/1989 | EP0347763A2 Dual rotating priority arbitration method for a multiprocessor memory bus |
| 12/27/1989 | EP0347557A2 Dual clocked data bus |
| 12/27/1989 | EP0248805B1 Method and means at a system for transmission of information |
| 12/27/1989 | CN1038363A Time-sharing communication interface for multi-micro processor system |
| 12/27/1989 | CN1038362A Peripheral controller and adapter interface |
| 12/27/1989 | CA1264092A1 Cascadable, high-bandwidth, multi-channel image transfer controller |
| 12/26/1989 | US4890303 Method and circuit for synchronizing a digital data transmission system with a network-external clock |
| 12/26/1989 | US4890271 Redundant termination of a communication line for maintaining the line properly terminated when one of the terminations is unpowered |
| 12/26/1989 | US4890243 Peripheral machine for programmable controller |
| 12/26/1989 | US4890224 Method and apparatus for fault tolerant communication within a computing system |
| 12/26/1989 | US4890222 Apparatus for substantially syncronizing the timing subsystems of the physical modules of a local area network |
| 12/26/1989 | US4890219 Mode conversion of computer commands |
| 12/20/1989 | EP0347082A2 Asynchronous interrupt status bit circuit |
| 12/20/1989 | EP0346946A1 Communication line controller |
| 12/20/1989 | EP0346917A2 Bus stealing method for concurrent CPU and I/O processing |
| 12/20/1989 | EP0346804A1 Data-processing and control device |
| 12/20/1989 | EP0346556A1 Electronic mail follow-up system |
| 12/20/1989 | EP0346401A1 Commander node method and apparatus for assuring adequate access to system ressources in a multiprocessor computer system. |
| 12/20/1989 | EP0346388A1 High speed raster image processor. |
| 12/20/1989 | CN1038182A Computer and telephone apparatus with user friendly computer interface and enhanced integrity features |
| 12/19/1989 | US4888728 Multipoint link data-transmission control system |
| 12/19/1989 | US4888727 Peripheral controller with paged data buffer management |
| 12/19/1989 | US4888685 Data conflict prevention for processor with input/output device |
| 12/19/1989 | US4888684 Multiprocessor bus protocol |
| 12/19/1989 | US4888683 Method and apparatus for loading programs in a distributed processing system |
| 12/19/1989 | US4888680 Peripheral device interface and controller |
| 12/14/1989 | WO1989012277A1 High speed relational data base processor |
| 12/14/1989 | WO1989012273A1 Testing method |
| 12/14/1989 | DE3917275A1 Interface system for use in an electronic computer |
| 12/13/1989 | EP0346259A2 Single data stream architecture for presentation, revision and resource document types |
| 12/13/1989 | EP0346141A2 High performance memory imaging network for a real time process control system |
| 12/13/1989 | EP0345584A2 Apparatus for hot removal from/insertion to a connection bus of a non removable media magnetic recording unit |
| 12/13/1989 | EP0345334A1 Managing interlocking |
| 12/13/1989 | CN1037984A Apparatus and method for a data processing system having a peer relationship among plurality of central processing units |
| 12/13/1989 | CN1037982A Providing 80386 with entry into bus arbitration in 80386/82385 microcomputer system wherein the 82385 operates in master made |
| 12/13/1989 | CN1037981A Bidirectional buffer with latch and parity capability |
| 12/13/1989 | CN1037980A Universal test and control module and its system |
| 12/12/1989 | US4887262 Single-channel bus system for multi-master use with bit cell synchronization, and master station comprising a bit cell synchronization element suitable for this purpose |
| 12/12/1989 | US4887235 Symbolic language data processing system |
| 12/12/1989 | US4887202 Input-output control method in a virtual machine system |
| 12/12/1989 | US4887076 Computer interconnect coupler for clusters of data processing devices |
| 12/06/1989 | EP0345000A2 Data processing system including different throughput access sources |
| 12/06/1989 | EP0344999A2 Data transmission system |
| 12/06/1989 | EP0344886A1 Data transfer processing system |