| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 07/07/1994 | WO1994015299A1 Arrangement with plug-in functional units |
| 07/07/1994 | WO1994015298A1 Disturbance-free connection to time-divided bus |
| 07/07/1994 | WO1994015297A1 Arrangement with plug-in functional units |
| 07/07/1994 | WO1994015296A1 High throughput computer system, memory component and resulting memory controller |
| 07/07/1994 | WO1994015295A1 System for data transmission between a computer bus and a network |
| 07/07/1994 | WO1994015294A1 Interactive computer system with multi-protocol capability |
| 07/07/1994 | WO1994015291A1 Control system |
| 07/07/1994 | WO1994015288A1 Distributed data processing system |
| 07/07/1994 | WO1994015269A2 Apparatus, system and method for facilitating communication between components having different byte orderings |
| 07/07/1994 | WO1994011828A3 Write buffer with full rank byte gathering |
| 07/06/1994 | EP0605349A2 Switched circuit connection management over public data networks for wide area networks |
| 07/06/1994 | EP0605170A1 A computer system interface |
| 07/06/1994 | EP0605091A2 Method and apparatus for forming an operational configuration of an interface Board |
| 07/06/1994 | EP0605088A2 Computer conferencing |
| 07/06/1994 | EP0604471A1 Multi-media signal processor computer system. |
| 07/06/1994 | CN1025382C Device driver system having generic operating system interface |
| 07/05/1994 | US5327570 Multiprocessor system having local write cache within each data processor node |
| 07/05/1994 | US5327566 Stage saving and restoring hardware mechanism |
| 07/05/1994 | US5327565 Data processing apparatus |
| 07/05/1994 | US5327564 Timed access system for protecting data in a central processing unit |
| 07/05/1994 | US5327560 Method of updating network reconfiguration information exchanged between a host computer and a communication control processor |
| 07/05/1994 | US5327559 Remote and batch processing in an object oriented programming system |
| 07/05/1994 | US5327554 Interactive terminal for the access of remote database information |
| 07/05/1994 | US5327540 Method and apparatus for decoding bus master arbitration levels to optimize memory transfers |
| 07/05/1994 | US5327539 Access processing system in information processor |
| 07/05/1994 | US5327538 Method of utilizing common buses in a multiprocessor system |
| 07/05/1994 | US5327486 Method and system for managing telecommunications such as telephone calls |
| 07/05/1994 | US5327468 Synchronization of time-of-day clocks in a distributed processing network system |
| 07/05/1994 | US5327465 Method and apparatus for squelch circuit in network communication |
| 07/05/1994 | US5327436 Communication control system |
| 07/05/1994 | US5327126 Apparatus for and method of parallel justifying and dejustifying data in accordance with a predetermined mapping |
| 07/05/1994 | US5327121 Three line communications method and apparatus |
| 07/05/1994 | US5327018 Interface circuit for chip cards |
| 06/29/1994 | EP0604341A2 A parallel scalable internetworking unit architecture |
| 06/29/1994 | EP0604333A1 Device of interconnected boards for a rapid information system |
| 06/29/1994 | EP0604309A1 Informationsystem with high data throughput, and resulting memory circuit and memory controller |
| 06/29/1994 | EP0604013A2 Method and apparatus for a caching file server |
| 06/29/1994 | EP0604010A1 Method and apparatus for subcontracts in distributed processing systems |
| 06/29/1994 | EP0603946A1 Switch and network interconnection equipment using address learning |
| 06/29/1994 | CN1088722A Management in telecom and open systems |
| 06/29/1994 | CN1025266C Radio data system interface of network controlled by present computer |
| 06/29/1994 | CA2112312A1 Method and apparatus of communication |
| 06/28/1994 | US5325536 Linking microprocessor interrupts arranged by processing requirements into separate queues into one interrupt processing routine for execution as one routine |
| 06/28/1994 | US5325535 Computer system |
| 06/28/1994 | US5325527 Client/server communication system utilizing a self-generating nodal network |
| 06/28/1994 | US5325521 Wait control device |
| 06/28/1994 | US5325516 Processor system with dual clock |
| 06/28/1994 | US5325513 Apparatus for selectively accessing different memory types by storing memory correlation information in preprocessing mode and using the information in processing mode |
| 06/28/1994 | US5325512 Circuit emulator |
| 06/28/1994 | US5325510 Multiprocessor system and architecture with a computation system for minimizing duplicate read requests |
| 06/28/1994 | US5325503 Cache memory system which snoops an operation to a first location in a cache line and does not snoop further operations to locations in the same line |
| 06/28/1994 | US5325499 Computer system including a write protection circuit for preventing illegal write operations and a write poster with improved memory |
| 06/28/1994 | US5325492 System for asynchronously delivering self-describing control elements with a pipe interface having distributed, shared memory |
| 06/28/1994 | US5325491 Method and apparatus for extending a computer bus |
| 06/28/1994 | US5325490 Method and apparatus for replacement of an original microprocessor with a replacement microprocessor in a computer system having a numeric processor extension |
| 06/28/1994 | US5325489 Data transfer control device using direct memory access |
| 06/28/1994 | US5325488 Peripheral mass memory subsystem have identical controllers connected to two parallel buses for accessing disk memory banks, solid-state disks, and cache memories |
| 06/28/1994 | US5325487 Shadow pipeline architecture in FIFO buffer |
| 06/28/1994 | US5325486 Apparatus for transferring blocks of image data |
| 06/28/1994 | US5325483 Image information retrieval network system |
| 06/28/1994 | US5325362 Scalable and efficient intra-domain tunneling mobile-IP scheme |
| 06/28/1994 | US5325359 MIL-STD-1553 interface device having concurrent remote terminal and monitor terminal operation |
| 06/28/1994 | US5325310 Method and system for persistant electronic mail reply processing |
| 06/23/1994 | WO1994014120A1 Arrangement with several functional units |
| 06/23/1994 | WO1994014116A1 Device using remote pseudo-socket functions |
| 06/23/1994 | DE4341886A1 Accessing memory in HDLC communications protocol hardware machine system with server |
| 06/23/1994 | DE4243348A1 Memory programmable control device |
| 06/22/1994 | EP0603103A2 Interconnection method for digital multimedia communications |
| 06/22/1994 | EP0602997A2 Information transmission system |
| 06/22/1994 | EP0602916A2 Cross-bar interconnect apparatus |
| 06/22/1994 | EP0602915A2 SIMD architecture for connection to host processor's bus |
| 06/22/1994 | EP0602909A2 SIMD architecture with bus for transferring data to and from processing units |
| 06/22/1994 | EP0602858A1 Apparatus and method for servicing interrupts in a multiprocessor system |
| 06/22/1994 | EP0602830A2 Automatic network element identity information distribution apparatus and method |
| 06/22/1994 | EP0602827A2 Multiple-master digital communication technique utilizing a dedicated contention bus |
| 06/22/1994 | EP0602825A2 Logical integration of multiple network elements in a telecommunications management network |
| 06/22/1994 | EP0602824A2 Automatic network element identity information registration apparatus and method |
| 06/22/1994 | EP0602823A2 Automatic detection of reachable network elements |
| 06/22/1994 | EP0602806A2 High-level data link controller (HDLC) receiver |
| 06/22/1994 | EP0602787A2 Method and apparatus for obtaining and for controlling the status of a networked peripheral |
| 06/22/1994 | EP0602786A2 Method and apparatus for managing access to a networked peripheral |
| 06/22/1994 | EP0602777A1 A terminal device management system and a method for detecting a failed terminal device using the system |
| 06/22/1994 | EP0602770A2 Abnormal packet processing system |
| 06/22/1994 | EP0602769A2 A multiprocessor system |
| 06/22/1994 | EP0602667A1 System and method for peripheral data transfer |
| 06/22/1994 | EP0602345A1 Synchronous communication system having multiplexed information transfer and transition phases |
| 06/22/1994 | EP0602295A1 Method for configuring and operating a telecommunication apparatus |
| 06/22/1994 | EP0602282A1 Resequencing means for a cell switching system node |
| 06/22/1994 | EP0602281A1 Resequencing means for a cell switching system node |
| 06/22/1994 | EP0524199A4 Telecommunication interface apparatus and method |
| 06/22/1994 | EP0346398B1 Apparatus and method for a node to obtain access to a bus |
| 06/21/1994 | US5323393 Method and apparatus for obtaining and for controlling the status of a networked peripheral |
| 06/19/1994 | CA2111264A1 System and method for peripheral data transfer |
| 06/16/1994 | DE4342515A1 Minimising data loss when peripheral fault occurs - evaluating fault condition in peripheral, breaking off host computer command at peripheral, and interrupting internal operations of peripheral and reporting to host |
| 06/16/1994 | DE4342220A1 Portable computer system with battery power management system - has system management RAM mapped onto main memory and accessible upon interrupt for storing driver programs for management of peripherals, and BIOS for starting drivers for control of peripheral depending upon interrupt |
| 06/16/1994 | DE4341896A1 Testing data processing equipment - inputting known data into test appts. which produces test data, selectively sending test data over network to second test appts., which determines whether test data corresponds to expected value |
| 06/16/1994 | DE4339183A1 Data processor with CPU having larger access capacity than memory or printer font ROM or cartridge - receives data output from memory according to two address signals and generates address expansion signal during data output control period |
| 06/15/1994 | EP0601917A1 Multimedia data management system |
| 06/15/1994 | EP0601715A1 Bus of CPU core optimized for accessing on-chip memory devices |
| 06/15/1994 | EP0601704A1 Method and apparatus for remotely altering programmable firmware stored in an interface board coupled to a network peripheral |