| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 03/24/1998 | US5731713 TTL to CMOS level translator with voltage and threshold compensation |
| 03/24/1998 | US5731712 Programmable gate array for relay ladder logic |
| 03/24/1998 | US5731711 Integrated circuit chip with adaptive input-output port |
| 03/19/1998 | WO1998011669A1 Three state switch detection using current sensing |
| 03/19/1998 | WO1998011667A1 Mixed mode cmos input buffer with bus hold |
| 03/19/1998 | CA2264911A1 Three state switch detection using current sensing |
| 03/18/1998 | EP0829966A1 Output circuit |
| 03/18/1998 | EP0829881A2 Wordline drive circuit for flash EEPROM memory |
| 03/18/1998 | EP0829140A1 A programmable logic device |
| 03/18/1998 | EP0829139A1 A multi-tiered hierarchical high speed switch matrix structure for very high-density complex programmable logic devices |
| 03/18/1998 | EP0829137A1 Dual feature input/timing pin |
| 03/18/1998 | EP0593628B1 Power mosfet driver with cross-conduction current reduction |
| 03/17/1998 | US5729495 For an integrated circuit |
| 03/17/1998 | US5729468 Reducing propagation delays in a programmable device |
| 03/17/1998 | US5729165 1.5v full-swing bootstrapped CMOS large capacitive-load driver circuit suitable for low-voltage deep-submicron CMOS VLSI |
| 03/17/1998 | US5729158 Parametric tuning of an integrated circuit after fabrication |
| 03/17/1998 | US5729157 Off-chip driver circuit |
| 03/17/1998 | US5729156 ECL to CMOS level translator using delayed feedback for high speed BiCMOS applications |
| 03/17/1998 | US5729155 High voltage CMOS circuit which protects the gate oxides from excessive voltages |
| 03/17/1998 | US5729154 Termination circuits and related output buffers |
| 03/17/1998 | US5729153 Output buffer with oscillation damping |
| 03/12/1998 | WO1998010518A1 Method and apparatus for universal program controlled bus architecture |
| 03/12/1998 | WO1998010517A1 Fpga architecture having ram blocks with programmable word length and width and dedicated address and data lines |
| 03/12/1998 | DE19711328A1 Level shifting circuit |
| 03/11/1998 | EP0827643A1 Bidirectional transmission line driver/receiver |
| 03/11/1998 | CN1175718A System for switching between stand-by and wake-up states, of information processing unit and of analogue switch |
| 03/10/1998 | US5727166 Buffer with drive characteristics controllable by software |
| 03/10/1998 | US5726988 Module with data verification for a serial multiplex data system |
| 03/10/1998 | US5726946 Semiconductor integrated circuit device having hierarchical power source arrangement |
| 03/10/1998 | US5726941 Semiconductor integrated circuit |
| 03/10/1998 | US5726928 Arithmetic logic unit circuit with reduced propagation delays |
| 03/10/1998 | US5726601 Integrated circuit and method for producing the same |
| 03/10/1998 | US5726591 MESFET logic device with clamped output drive capacity and low power |
| 03/10/1998 | US5726590 Interface in a semiconductor integrated circuit |
| 03/10/1998 | US5726589 Off-chip driver circuit with reduced hot-electron degradation |
| 03/10/1998 | US5726588 Differential-to-CMOS level converter having cross-over voltage adjustment |
| 03/10/1998 | US5726587 BiCMOS tri-state buffer with low leakage current |
| 03/10/1998 | US5726586 Programmable application specific integrated circuit and logic cell therefor |
| 03/10/1998 | US5726585 Switching circuit for use in a semiconductor memory device |
| 03/10/1998 | US5726584 Virtual high density programmable integrated circuit having addressable shared memory cells |
| 03/10/1998 | US5726582 Control circuit for keeping constant the impedance of a termination network |
| 03/05/1998 | DE19646684C1 Output buffer circuit for high-speed data transmission line control |
| 03/04/1998 | EP0827282A1 Connection configuration for reducing noise radiation in an integrated circuit |
| 03/04/1998 | EP0827069A2 Arithmetic circuit and method |
| 03/04/1998 | EP0604651B1 Fail-safe logical operation circuit using electromagnetic coupling |
| 03/03/1998 | US5724361 High performance n:1 multiplexer with overlap control of multi-phase clocks |
| 03/03/1998 | US5724304 Repeater with threshold modulation |
| 03/03/1998 | US5724302 High density decoder |
| 03/03/1998 | US5724297 Semiconductor integrated circuit device and method of activating the same |
| 03/03/1998 | US5724249 System and method for power management in self-resetting CMOS circuitry |
| 03/03/1998 | US5723994 Level boost restoration circuit |
| 03/03/1998 | US5723992 Low leakage output driver circuit which can be utilized in a multi-voltage source |
| 03/03/1998 | US5723987 Level shifting output buffer with p channel pulldown transistors which are bypassed |
| 03/03/1998 | US5723986 Level shifting circuit |
| 03/03/1998 | US5723985 Clocked high voltage switch |
| 03/03/1998 | US5723984 Field programmable gate array (FPGA) with interconnect encoding |
| 02/26/1998 | WO1998008306A1 Reconfigurable computing system |
| 02/26/1998 | WO1998008305A1 Rapid, low-power-loss and ecl (emitter coupled logic)-compatible output circuit used in cmos technology |
| 02/26/1998 | WO1998008304A1 Low-delay signal level converter with protective circuit |
| 02/25/1998 | EP0825513A2 Clock distribution in a large scale integrated circuit |
| 02/25/1998 | EP0824792A1 Floor plan for scalable multiple level interconnect architecture |
| 02/25/1998 | EP0824791A1 Scalable multiple level interconnect architecture |
| 02/24/1998 | US5721740 Flip-flop controller for selectively disabling clock signal |
| 02/24/1998 | US5721709 Address decoder circuits adjusted for a high speed operation at a low power consumption |
| 02/24/1998 | US5721695 Simulation by emulating level sensitive latches with edge trigger latches |
| 02/24/1998 | US5721516 CMOS inverter |
| 02/24/1998 | US5721503 Flash analog-to-digital converter with latching exclusive or gates |
| 02/24/1998 | US5721498 Block segmentation of configuration lines for fault tolerant programmable logic device |
| 02/24/1998 | CA2072428C Floating-well cmos output driver |
| 02/17/1998 | US5719525 Enhanced voltage tracking circuit for high voltage tolerant buffers |
| 02/17/1998 | US5719509 Method of controlling transmission of binary pulses on a transmission line |
| 02/17/1998 | US5719507 Logic gate having transmission gate for electrically configurable device multiplexer |
| 02/17/1998 | US5719506 Fast signal path for programmable logic device |
| 02/17/1998 | US5719505 Reduced power PLA |
| 02/17/1998 | US5719504 Semiconductor device having a scan path |
| 02/17/1998 | US5719445 Input delay control |
| 02/12/1998 | WO1998006180A1 A clock signal frequency multiplier |
| 02/12/1998 | WO1998006177A1 Combined logic gate and latch |
| 02/12/1998 | DE19712553A1 Semiconductor memory circuit, e.g. CRDL, for multimedia in lap-top computer |
| 02/12/1998 | DE19633714C1 Schnelle, verlustleistungsarme und ECL-kompatible Ausgangs-schaltung in CMOS-Technologie Fast, low power loss and ECL-compatible output circuit in CMOS technology |
| 02/12/1998 | DE19630515A1 S-T interface for ISDN using specification ITU I.430 |
| 02/11/1998 | EP0823786A2 Pseudo differential bus driver/receiver for field programmable devices |
| 02/11/1998 | EP0823785A2 Input circuit |
| 02/11/1998 | EP0823711A2 Digital memory element |
| 02/11/1998 | EP0823148A1 Gtl output amplifier for coupling an input signal at the input to a transmission line at the output |
| 02/11/1998 | EP0823091A1 Microprocessor with distributed registers accessible by programmable logic device |
| 02/11/1998 | EP0822908A1 Continuous input cell for data acquisition circuits |
| 02/11/1998 | EP0822907A1 Ac input cell for data acquisition circuits |
| 02/10/1998 | US5717928 System and a method for obtaining a mask programmable device using a logic description and a field programmable device implementing the logic description |
| 02/10/1998 | US5717901 Variable depth and width memory device |
| 02/10/1998 | US5717695 Output pin for selectively outputting one of a plurality of signals internal to a semiconductor chip according to a programmable register for diagnostics |
| 02/10/1998 | US5717622 Selecting circuit including circuits having different time constants to which each of a plurality of input signals is applied, and adding circuit using the same |
| 02/10/1998 | US5717557 Low side line driver |
| 02/10/1998 | US5717355 Method and apparatus with active feedback for shifting the voltage level of a signal |
| 02/10/1998 | US5717354 Input protection circuit and method for semiconductor memory device |
| 02/10/1998 | US5717352 Wave formatter circuit for semiconductor test system |
| 02/10/1998 | US5717347 Logic circuit of the emitter-coupled type, operating at a low supply voltage |
| 02/10/1998 | US5717346 Low skew multiplexer network and programmable array clock/reset application thereof |
| 02/10/1998 | US5717344 PLA late signal circuitry using a specialized gap cell and PLA late signal circuitry using switched output |
| 02/10/1998 | US5717343 High-drive CMOS output buffer with noise supression using pulsed drivers and neighbor-sensing |