Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
02/2005
02/17/2005WO2005015742A1 Clock i/o unit
02/17/2005WO2005015534A1 Delay time correction circuit, video data processing circuit, and flat display apparatus
02/17/2005WO2005015383A1 Switched charge multiplier-divider
02/17/2005WO2004001803A3 Logic array devices having complex macro-cell architecture and methods facilitating use of same
02/17/2005US20050039157 Method for mapping a logic circuit to a programmable look up table (LUT)
02/17/2005US20050039155 FPGA architecture with mixed interconnect resources optimized for fast and low-power routing and methods of utilizing the same
02/17/2005US20050039078 Trace data source identification within a trace data stream
02/17/2005US20050039039 Method and apparatus for providing security for debug circuitry
02/17/2005US20050038844 Programmable logic device including multipliers and configurations thereof to reduce resource utilization
02/17/2005US20050038761 Evolutionary programming of configurable logic devices
02/17/2005US20050036561 Receiving apparatus and transmission apparatus utilizing the same
02/17/2005US20050036454 Transmission apparatus
02/17/2005US20050036398 Synchronous first-in/first-out block memory for a field programmable gate array
02/17/2005US20050036134 Semiconductor integrated circuit
02/17/2005US20050035807 Level down converter
02/17/2005US20050035803 Semiconductor integrated circuit with reduced leakage current
02/17/2005US20050035802 Semiconductor integrated circuit with reduced leakage current
02/17/2005US20050035789 Output circuit device for clock signal distribution in high-speed signal transmission
02/17/2005US20050035785 Logic circuit and semiconductor integrated circuit
02/17/2005US20050035783 Field programmable gate array
02/17/2005US20050035782 Programmable logic device with reduced power consumption
02/17/2005US20050035781 Programmable broadcast initialization of memory blocks
02/17/2005US20050035780 Driver driving method, driver circuit, transmission method using driver, and control circuit
02/17/2005DE10344647B3 Dual-rail signal circuit device e.g. for chip card security applications, has dual-rail data input signals with similar values provided as pre-charge signal to obtain dual-rail data output signal having same values
02/17/2005DE10331607A1 Ausgangstreiber für eine integrierte Schaltung und Verfahren zum Ansteuern eines Ausgangstreibers Output driver for an integrated circuit and method for driving an output driver
02/17/2005DE102004020987A1 Pegelschieberschaltung Level shifter circuit
02/16/2005EP1506581A2 Superconducting quantum bit device with josephson junctions
02/16/2005EP1506496A2 Digital logic unit that can be reconfigured
02/16/2005EP1506493A1 Reprogrammable hardware for examining network streaming data to detect redefinable patterns and define responsive processing
02/16/2005CN1582533A Programmable interface for field programmable gate array cores
02/16/2005CN1582532A Domino logic with self-timed precharge
02/16/2005CN1581700A Regulation for clock
02/16/2005CN1581698A Apparatus and method for precisely controlling termination impedance
02/16/2005CN1581697A 传输装置 Transmission device
02/16/2005CN1581696A Receiving device and transmission device using same
02/16/2005CN1581695A Port polling selection method
02/16/2005CN1581689A Time pulse generating module
02/16/2005CN1581504A Cell structure for bipolar integrated circuits and method
02/16/2005CN1581360A 逻辑电路和半导体集成电路 A logic circuit and a semiconductor integrated circuit
02/16/2005CN1581339A Data with multiple sets of error correction codes
02/16/2005CN1189852C Drive circuit and display apparatus comprising same
02/15/2005US6856542 Programmable logic device circuit and method of fabricating same
02/15/2005US6856178 Multi-function input/output driver
02/15/2005US6856177 High side power switch with charge pump and bootstrap capacitor
02/15/2005US6856176 Sub-micron high input voltage tolerant input output (I/O) circuit
02/15/2005US6856171 Synchronization of programmable multiplexers and demultiplexers
02/15/2005US6856169 Method and apparatus for signal reception using ground termination and/or non-ground termination
02/15/2005US6856168 5 Volt tolerant IO scheme using low-voltage devices
02/15/2005US6856167 Field programmable gate array with a variably wide word width memory
02/15/2005US6856166 Status scheme signal processing circuit
02/15/2005US6856163 Power supply decoupling for parallel terminated transmission line
02/10/2005WO2005013490A1 Switch module for a field programmable logic circuit
02/10/2005WO2005013324A2 Memory access via serial memory interface
02/10/2005WO2004109706A3 Nanoscale wire-based sublithographic programmable logic arrays
02/10/2005US20050034094 Three dimensional integrated circuits
02/10/2005US20050034026 Data processing system trace bus
02/10/2005US20050033902 Receiver, transceiver circuit, signal transmission method, and signal transmission system
02/10/2005US20050030618 Reflexive optical screen, and viewing system incorporating the same
02/10/2005US20050030083 IC device having a transistor switch for a power supply
02/10/2005US20050030076 Distributed delay-locked-based clock and data recovery systems
02/10/2005US20050030070 Input circuit, display device and information display apparatus
02/10/2005US20050030068 Output driver for an integrated circuit and method for driving an output driver
02/10/2005US20050030065 System and method for implementing self-timed decoded data paths in integrated circuits
02/10/2005US20050030064 Self-correcting i/o interface driver scheme for memory interface
02/10/2005US20050030063 Integrated circuit and method of improving signal integrity
02/10/2005US20050030062 Logic circuitry with shared lookup table
02/10/2005US20050030061 Multi-function interface
02/10/2005US20050030060 Open drain type output buffer
02/10/2005DE102004034934A1 Ausgabetreiber und Verfahren zum Reduzieren von Kopplungsrauschen Output driver and a method for reducing coupling noise
02/09/2005EP1505735A1 Circuit for converting signals varying between two voltages
02/09/2005EP1504537A2 High speed configurable transceiver architecture
02/09/2005EP1151387A4 Apparatus and method for topography dependent signaling
02/09/2005CN1578147A 半导体集成电路 The semiconductor integrated circuit
02/09/2005CN1578146A Input buffer circuit, and semiconductor apparatus having the same
02/09/2005CN1578143A 半导体集成电路器件 The semiconductor integrated circuit device
02/09/2005CN1578141A Semiconductor apparatus
02/09/2005CN1577859A 半导体集成电路 The semiconductor integrated circuit
02/09/2005CN1577610A Integrated circuit output driving device and driving method for output driver
02/09/2005CN1577423A Display
02/09/2005CN1188948C Method and apparatus for configurating programmable logic unit array
02/09/2005CN1188947C Logic circuit and carry lookahead circuit
02/09/2005CN1188865C Method and device of using compressed data in far-end box to initialize integrated circuit
02/08/2005US6853929 Pipeline control for power management
02/08/2005US6853679 Interconnect circuit for data transmission in an integrated circuit
02/08/2005US6853322 Reducing jitter in mixed-signal integrated circuit devices
02/08/2005US6853240 Master clock input circuit
02/08/2005US6853239 Multiple circuit blocks with interblock control and power conservation
02/08/2005US6853236 Circuit apparatus operable under high voltage
02/08/2005US6853233 Level-shifting circuitry having “high” output impedance during disable mode
02/08/2005US6853217 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit
02/08/2005US6853214 Circuit configuration for controlling load-dependent driver strengths
02/08/2005US6853213 Input/output circuit, reference-voltage generating circuit, and semiconductor integrated circuit
02/08/2005US6853019 Semiconductor device and manufacturing method for the same
02/03/2005WO2005011218A1 Cross-over voltage lock for differential output drivers
02/03/2005WO2005010943A2 High side power switch with charge pump and bootstrap capacitor
02/03/2005WO2005010198A2 Protein logic gates
02/03/2005US20050028126 Integrated circuit structure and a design method thereof
02/03/2005US20050028067 Data with multiple sets of error correction codes
02/03/2005US20050027895 Input/output pad with mornitoring ability and operation method thereof
02/03/2005US20050027836 Computing system