| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 10/19/2004 | US6806747 Output circuit and microcomputer |
| 10/19/2004 | US6806743 Semiconductor integrated circuit device |
| 10/19/2004 | US6806738 Semiconductor circuit device capable of high speed decoding |
| 10/19/2004 | US6806735 Buffer for contact circuit |
| 10/19/2004 | US6806734 Level shifting circuit and active matrix driver |
| 10/19/2004 | US6806733 Multiple data rate interface architecture |
| 10/19/2004 | US6806732 FPGA with improved structure for implementing large multiplexers |
| 10/19/2004 | US6806729 Ground bounce detection circuit for use in data error reduction |
| 10/19/2004 | US6806695 Apparatus and method for efficiency optimization of integrated circuits by temperature sensor and servo loop |
| 10/19/2004 | US6806516 Semiconductor device and system |
| 10/14/2004 | WO2004088500A1 Programmable logic device |
| 10/14/2004 | WO2004019495A3 Supply voltage modulation circuit for mos transistors, reconfigurable logic device and method of processing an input signal to a logic circuit |
| 10/14/2004 | WO2004010578A3 Level shifting and level-shifting amplifier circuits |
| 10/14/2004 | WO2003105227A3 Data carrier comprising an integrated circuit with an esd protection circuit |
| 10/14/2004 | US20040205447 Integrated circuit devices having data inversion circuits therein with multi-bit prefetch structures and methods of operating same |
| 10/14/2004 | US20040205385 Method and apparatus for improving reliability in microprocessors |
| 10/14/2004 | US20040201411 Logic circuit |
| 10/14/2004 | US20040201410 Level shifter |
| 10/14/2004 | US20040201400 Superconductor ballistic RAM |
| 10/14/2004 | DE10311717A1 Magnetische Logikeinrichtung und Verfahren zu deren Betrieb Magnetic logic device and method for its operation |
| 10/14/2004 | CA2521167A1 Programmable logic device |
| 10/13/2004 | EP1466235A1 Method and system for dynamically clocking digital systems based on power usage |
| 10/13/2004 | EP1436826A4 A high performance integrated circuit regulator with substrate transient suppression |
| 10/13/2004 | CN1537376A hierarchical nultiplexer-based integrated circuit interconnect architecture for scalability and automatic generation |
| 10/13/2004 | CN1536668A Complementary metal oxide semiconductor phase reverser |
| 10/12/2004 | US6804812 Depopulated programmable logic array |
| 10/12/2004 | US6804146 Hybrid semiconductor—magnetic spin based memory |
| 10/12/2004 | US6803809 Step-down circuit for generating a stable internal voltage |
| 10/12/2004 | US6803803 Method and apparatus for compensating circuits for variations in temperature supply and process |
| 10/12/2004 | US6803793 Reduced swing charge recycling circuit arrangement and adder including the same |
| 10/12/2004 | US6803792 Input buffer circuit with constant response speed of output inversion |
| 10/12/2004 | US6803789 High voltage tolerant output buffer |
| 10/12/2004 | US6803788 SSTL voltage translator with dynamic biasing |
| 10/12/2004 | US6803787 State machine in a programmable logic device |
| 10/12/2004 | US6803786 Structures and methods providing columns of tightly coupled processor and RAM blocks within an array of logic blocks |
| 10/12/2004 | US6803783 Time borrowing using dynamic clock shift for bus speed performance |
| 10/07/2004 | WO2004086625A1 Reconfigurable logical circuit using transistor having spin-dependent transmission characteristic |
| 10/07/2004 | WO2004086624A1 Latching dynamic logic structure |
| 10/07/2004 | US20040199894 Interconnect structure for electrical devices |
| 10/07/2004 | US20040199690 Apparatus and method for topography dependent signaling |
| 10/07/2004 | US20040199689 SRAM bus architecture and interconnect to an FPGA |
| 10/07/2004 | US20040196727 Computer systems |
| 10/07/2004 | US20040196684 Semiconductor integrated circuit device, storage medium on which cell library is stored and designing method for semiconductor intergrated circuit |
| 10/07/2004 | US20040196680 Nonvolatile programmable logic circuit |
| 10/07/2004 | US20040196249 Liquid crystal display apparatus having level conversion circuit |
| 10/07/2004 | US20040196066 Architecture and interconnect scheme for programmable logic circuits |
| 10/07/2004 | US20040196065 Programmable devices with convertibility to customizable devices |
| 10/06/2004 | EP1465345A2 Interconnection resources for programmable logic integrated circuit devices |
| 10/06/2004 | EP1465344A1 Device and method for converting an input signal |
| 10/06/2004 | EP1464118A1 Fpga and embedded circuitry initialization and processing |
| 10/06/2004 | EP0795244B1 Coupling arrangement in a terminating circuit |
| 10/06/2004 | CN1535500A Differential cascode current mode driver |
| 10/06/2004 | CN1535466A Programmable molecular device |
| 10/06/2004 | CN1170363C Input buffer circuit |
| 10/06/2004 | CN1170312C Semiconductor integrated circuit |
| 10/05/2004 | US6801417 Semiconductor integrated circuit device |
| 10/05/2004 | US6801181 Level shifter for use in active matrix display apparatus |
| 10/05/2004 | US6801071 Semiconductor integrated circuit device with differential output driver circuit, and system for semiconductor integrated circuit device |
| 10/05/2004 | US6801065 Transistor output circuit, semiconductor device including transistor output circuit, and switching electric power unit having transistor output circuit |
| 10/05/2004 | US6801064 Buffer circuit using low voltage transistors and level shifters |
| 10/05/2004 | US6801062 Output circuit |
| 10/05/2004 | US6801061 Reduced current input buffer circuit |
| 10/05/2004 | US6801057 Silicon-on-insulator dynamic logic |
| 10/05/2004 | US6801056 Monotonic dynamic-static pseudo-NMOS logic circuit |
| 10/05/2004 | US6801054 Output buffer circuit |
| 10/05/2004 | US6800884 Inter-tile buffer system for a field programmable gate array |
| 09/30/2004 | WO2004084410A1 Magnetic logic device and method for the operation thereof |
| 09/30/2004 | WO2004084000A2 Programmable logic devices with integrated standard-cell logic blocks |
| 09/30/2004 | US20040194048 System and method for efficiently mapping heterogeneous objects onto an array of heterogeneous programmable logic resources |
| 09/30/2004 | US20040191976 Adjusting the strength of output buffers |
| 09/30/2004 | US20040189371 Level translator circuit for use between circuits having distinct power supplies |
| 09/30/2004 | US20040189366 Clocking scheme and clock system for a monolithic integrated circuit |
| 09/30/2004 | US20040189363 Phase interpolator and receiver |
| 09/30/2004 | US20040189354 Differential current driver and data transmission method |
| 09/30/2004 | US20040189352 Data output buffer capable of controlling data valid window in semiconductor memory devices |
| 09/30/2004 | US20040189349 Device and method for converting an input signal |
| 09/30/2004 | US20040189347 Robust variable keeper strength process-compensated dynamic circuit and method |
| 09/30/2004 | US20040189346 Semiconductor device with charge share countermeasure |
| 09/30/2004 | US20040189345 Mixed-voltage I/O design with novel floating N-well and gate-tracking circuits |
| 09/30/2004 | US20040189344 Charge transfer device and solid state imaging device |
| 09/30/2004 | US20040188703 Switch |
| 09/29/2004 | EP1462964A2 Method for stimulating functional logic circuit with logical stimulus |
| 09/29/2004 | EP1461863A2 Differential amplifier circuit for regenerating complementary digital signals |
| 09/29/2004 | EP1461861A1 Hot carrier injection suppression circuit |
| 09/29/2004 | EP1461698A2 Method of scheduling in a reconfigurable hardware architecture with multiple hardware configurations |
| 09/29/2004 | CN1533659A 线路驱动器 Line Drive |
| 09/29/2004 | CN1169289C Level shift circuit |
| 09/29/2004 | CN1169153C Internal voltage boosting circuit in semiconductor memory device |
| 09/29/2004 | CN1169033C System for switching between stand-by and wake-up states, of information processing unit and of analogue switch |
| 09/28/2004 | US6799310 Integrated circuit layout method and program for mitigating effect due to voltage drop of power supply wiring |
| 09/28/2004 | US6799288 Detecting and mitigating memory device latchup in a data processor |
| 09/28/2004 | US6799240 SRAM bus architecture and interconnect to an FPGA |
| 09/28/2004 | US6798367 Size-reduced majority circuit |
| 09/28/2004 | US6798277 Reference voltage circuit and electronic device |
| 09/28/2004 | US6798276 Reduced potential generation circuit operable at low power-supply potential |
| 09/28/2004 | US6798267 Buffer circuit with programmable switching thresholds |
| 09/28/2004 | US6798256 Resonant buffer apparatus, method, and system |
| 09/28/2004 | US6798247 Output buffer circuit |
| 09/28/2004 | US6798244 Output buffer with overvoltage protection |
| 09/28/2004 | US6798243 Apparatus and method for level-shifting input receiver circuit from high external voltage to low internal supply voltage |