Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
04/2005
04/12/2005US6879185 Low power clock distribution scheme
04/12/2005US6879184 Programmable logic device architecture based on arrays of LUT-based Boolean terms
04/12/2005US6879183 Programmable logic device architectures with super-regions having logic regions and a memory region
04/12/2005US6879182 CPLD with multi-function blocks and distributed memory
04/07/2005WO2005032039A1 Circuit arrangement and method for processing a dual-rail signal
04/07/2005WO2005031976A1 Integrated circuit with electrostatic discharge protection
04/07/2005WO2005031973A2 Cmos circuit system
04/07/2005WO2003059024A3 Circuits with improved power supply rejection
04/07/2005US20050076275 Integraged circuit and method for testing the integrated circuit
04/07/2005US20050075814 Low power data storage element with enhanced noise margin
04/07/2005US20050073873 Reconfigurable analog cell and an arrangement comprising a plurality of such cell
04/07/2005US20050073785 Method and apparatus for mode selection for high voltage integrated circuits
04/07/2005US20050073353 Circuit of redundancy IO fuse in semiconductor device
04/07/2005US20050073349 Voltage level transferring circuit
04/07/2005US20050073337 Method and apparatus for a chaotic computing module
04/07/2005US20050073198 Interface circuit power reduction
04/07/2005DE10339047A1 Treiber-Einrichtung, insbesondere für ein Halbleiter-Bauelement, sowie Verfahren zum Betreiben einer Treiber-Einrichtung Driver means, in particular for a semiconductor device, and method for operating a device driver
04/07/2005DE102004041335A1 Datentreiberschaltung und zugehöriger Halbleiterbaustein Data driver circuit and associated semiconductor device
04/07/2005DE102004020699A1 Integrierte Halbleiterschaltung A semiconductor integrated circuit
04/06/2005EP1521368A2 Field programmable gate array
04/06/2005EP1521187A1 Method and device for configuration of PLDS
04/06/2005EP1520298A1 Integrated circuit having building blocks
04/06/2005EP1520183A2 Single pin multilevel integrated circuit test interface
04/06/2005CN1604470A 半导体集成电路器件 The semiconductor integrated circuit device
04/06/2005CN1196266C Multi-clock integrated circuit with clock generator and bi-directional clock pin arrangement
04/06/2005CN1196263C Forward body bias transistor circuit
04/05/2005US6876594 Integrated circuit with programmable fuse array
04/05/2005US6876564 Integrated circuit device and method for applying different types of signals to internal circuit via one pin
04/05/2005US6876241 Circuit for generating from low voltage edges higher voltage pulses having precise amplitudes and durations
04/05/2005US6876234 Integrated circuit with output drivers
04/05/2005US6876232 Methods and arrangements for enhancing domino logic
04/05/2005US6876230 Synchronous clocked full-rail differential logic with single-rail logic and shut-off
04/05/2005US6876228 Field programmable gate array
04/05/2005US6876227 Simplifying the layout of printed circuit boards
04/05/2005US6876226 Integrated digital circuit
04/05/2005US6876225 Input/output interfacing circuit, input/output interface, and semiconductor device having input/out interfacing circuit
04/05/2005CA2335312C Interface module with protection circuit and method of protecting an interface
03/2005
03/31/2005WO2005029704A1 A dynamic and differential cmos logic with signal-independent power consumption to withstand differential power analysis
03/31/2005WO2005029703A1 Circuit for providing a logic gate function and a latch function
03/31/2005WO2004003778A3 Loosely-biased heterogeneous reconfigurable arrays
03/31/2005US20050069128 Data-generating device and data-writing device for FPGA
03/31/2005US20050068811 Non-cascading charge pump circuit and method
03/31/2005US20050068071 Programmable dual drive strength output buffer with a shared boot circuit
03/31/2005US20050068070 I/O buffer with wide range voltage translator
03/31/2005US20050068069 Input/output buffer
03/31/2005US20050068068 Differential transistor and method therefor
03/31/2005US20050068067 Input buffer capable of reducing input capacitance seen by input signal
03/31/2005US20050068066 Logic circuit
03/31/2005US20050068064 Output device for static random access memory
03/31/2005US20050068063 Differential to single-ended logic converter
03/31/2005US20050068062 Semiconductor device and level conversion circuit
03/31/2005US20050068060 Transmission signal correction circuit
03/31/2005US20050068059 Suppressing the leakage current in an integrated circuit
03/30/2005EP1519490A1 Control circuit and reconfigurable logic block
03/30/2005EP1519489A1 An improved field programmable gate array device
03/30/2005EP1519488A2 Self-programmable bidirectional buffer circuit and method
03/30/2005EP1519487A1 Method and arrangement for reducing leakage current in semiconductor circuits
03/30/2005EP1479099A4 Methods and systems for reducing power-on failures of integrated circuits
03/30/2005EP1147608B1 Device for reducing electromagnetic emission in integrated circuits provided with driver stages
03/30/2005EP1080531B1 A dedicated interface architecture for a hybrid circuit
03/30/2005CN1602587A Method for preventing transients during switching processes in integrated switching circuits, and an integrated switching circuit
03/30/2005CN1601904A Logic circuit device and working method of programable logic circuit
03/30/2005CN1601595A Driver circuit
03/29/2005US6874107 Integrated testing of serializer/deserializer in FPGA
03/29/2005US6873842 Wireless programmable logic devices
03/29/2005US6873545 Hybrid semiconductor-magnetic device and method of operation
03/29/2005US6873503 SSTL pull-up pre-driver design using regulated power supply
03/29/2005US6873209 Input buffer circuit having function of canceling offset voltage
03/29/2005US6873196 Slew rate control of output drivers using FETs with different threshold voltages
03/29/2005US6873189 I/O buffer circuit
03/29/2005US6873188 Limited switch dynamic logic selector circuits
03/29/2005US6873187 Method and apparatus for controlling signal distribution in an electronic circuit
03/29/2005US6873185 Logic array devices having complex macro-cell architecture and methods facilitating use of same
03/29/2005US6873183 Method and circuit for glitchless clock control
03/29/2005US6873182 Programmable logic devices having enhanced cascade functions to provide increased flexibility
03/29/2005US6873181 Automated implementation of non-arithmetic operators in an arithmetic logic cell
03/29/2005US6873180 Multi-access FIFO queue
03/29/2005US6873179 Signal transmitting device suited to fast signal transmission
03/29/2005US6873178 Skewed bus driving method and circuit
03/29/2005US6873177 Systems and methods for programming a secured CPLD on-the-fly
03/29/2005US6872991 Low gate-leakage virtual rail circuit
03/24/2005WO2005027444A2 Tx line driver with common mode idle state and selectable slew rates
03/24/2005WO2005027234A1 Quantum turing machine
03/24/2005WO2005001742A3 Cad (computer-aided decision) support for medical imaging using machine learning to adapt cad process with knowledge collected during routine use of cad system
03/24/2005WO2004100375A3 Improvements to resonant line drivers
03/24/2005WO2004099510A3 Wear assembly for the digging edge of an excavator
03/24/2005US20050066246 Lab-on-chip system and method and apparatus for manufacturing and operating same
03/24/2005US20050066098 Priority circuit
03/24/2005US20050066077 Data transfer control device and electronic instrument
03/24/2005US20050064837 Circuits with improved power supply rejection
03/24/2005US20050063478 Circuit arrangement and method for producing a dual-rail signal
03/24/2005US20050063373 Method and apparatus for network with multilayer metalization
03/24/2005US20050063239 Magnetic spin based memory with semiconductor selector
03/24/2005US20050063112 Semiconductor device and system
03/24/2005US20050062521 Reference buffer with dynamic current control
03/24/2005US20050062518 Boosting voltage control circuit
03/24/2005US20050062516 Method for preventing transients during switching processes in integrated switching circuits, and an integrated switching circuit
03/24/2005US20050062515 Pulse output circuit, shift register and electronic equipment
03/24/2005US20050062509 Buffer/voltage-mirror arrangements for sensitive node voltage connections
03/24/2005US20050062508 Driver circuit
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