| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 06/28/2007 | US20070146049 Semiconductor integrated circuit device |
| 06/28/2007 | US20070146043 Interface circuit and signal clamping circuit using level-down shifter |
| 06/28/2007 | US20070146013 Dynamic logic with adaptive keeper |
| 06/28/2007 | US20070146012 Reconfigurable logic structures |
| 06/28/2007 | US20070146011 Duty cycle adjustment |
| 06/28/2007 | US20070146010 Current supply circuit, ring oscillator, nonvolatile semiconductor device and electronic card and electronic device |
| 06/28/2007 | US20070146009 Apparatus for controlling drive current in semiconductor integrated circuit devices |
| 06/28/2007 | US20070146008 Semiconductor circuit comprising vertical transistor |
| 06/28/2007 | US20070146007 Level shift delay equalization circuit and methodology |
| 06/28/2007 | US20070146006 Circuit for generating precision soft-start frequency for either value of address bit applied to external reset pin |
| 06/28/2007 | US20070146005 System and method for configuring information handling system integrated circuits |
| 06/28/2007 | US20070146004 On-die termination circuit and method for semiconductor memory apparatus |
| 06/28/2007 | DE10226066B4 Pegelschieberschaltung und Leistungshalbleitervorrichtung A level shifter circuit and the power semiconductor device |
| 06/28/2007 | DE102005050624B4 CMOS-Pufferschaltung und Verwendung derselben CMOS buffer circuit and using the same |
| 06/27/2007 | EP1801975A1 Output buffer |
| 06/27/2007 | EP1230734B1 Adaptive dead time control for push-pull switching circuits |
| 06/27/2007 | EP1064767B8 High speed signaling for interfacing vlsi cmos circuits |
| 06/27/2007 | CN1988404A Apparatus for adjusting phase between the different phases in power line communication system |
| 06/27/2007 | CN1988388A 电压选择电路 Voltage selection circuit |
| 06/27/2007 | CN1988387A Judging circuit and method for high order single circulation over sampling noise shaping stability |
| 06/27/2007 | CN1987990A Display apparatus |
| 06/27/2007 | CN1987504A Semiconductor integrated circuit and designing method thereof |
| 06/27/2007 | CN1323363C Data output circuit and data outputting method |
| 06/26/2007 | US7237231 Automatic identification of input values that expose output failures in a software object |
| 06/26/2007 | US7237216 Clock gating approach to accommodate infrequent additional processing latencies |
| 06/26/2007 | US7237087 Reconfigurable multidimensional array processor allowing runtime reconfiguration of selected individual array cells |
| 06/26/2007 | US7236032 Ultra-drowsy circuit |
| 06/26/2007 | US7236031 Fast bistable circuit protected against random events |
| 06/26/2007 | US7236019 Low current wide VREF range input buffer |
| 06/26/2007 | US7236013 Configurable output buffer and method to provide differential drive |
| 06/26/2007 | US7236012 Data output driver that controls slew rate of output signal according to bit organization |
| 06/26/2007 | US7236011 High-speed differential logic buffer |
| 06/26/2007 | US7236010 Reduced area freeze logic for programmable logic blocks |
| 06/26/2007 | US7236009 Operational time extension |
| 06/26/2007 | US7236008 Multiple size memories in a programmable logic device |
| 06/26/2007 | US7236007 Methods and systems for achieving improved intellectual property protection for programmable logic devices |
| 06/26/2007 | US7236006 Logic circuit, logic circuit design method, logic circuit design system, and logic circuit design program |
| 06/26/2007 | US7236005 Majority voter circuit design |
| 06/26/2007 | US7236004 Low voltage differential signaling with output differential voltage to output offset voltage tracking |
| 06/26/2007 | US7236003 H-bridge circuit with shoot through current prevention during power-up |
| 06/26/2007 | US7236002 Digital CMOS-input with N-channel extended drain transistor for high-voltage protection |
| 06/26/2007 | US7236001 Redundancy circuits hardened against single event upsets |
| 06/26/2007 | US7236000 Method and apparatus for error mitigation of programmable logic device configuration memory |
| 06/26/2007 | US7235999 System monitor in a programmable logic device |
| 06/26/2007 | US7234643 Microelectronic circuit for activation or deactivation of at least one input/output, corresponding smart card reader and deactivation method |
| 06/26/2007 | CA2468928C High-speed output circuit with low voltage capability |
| 06/21/2007 | WO2007070886A2 Address transition detector for fast flash memory device |
| 06/21/2007 | WO2005008893A8 Semiconductor integrated circuit |
| 06/21/2007 | US20070143052 Calibration circuit and semiconductor device incorporating the same |
| 06/21/2007 | US20070139237 Look-up table structure with embedded carry logic |
| 06/21/2007 | US20070139119 Variable attenuator |
| 06/21/2007 | US20070139093 Interface circuit and signal clamping circuit using level-down shifter |
| 06/21/2007 | US20070139082 Method and apparatus for implementing subthreshold leakage reduction in LSDL |
| 06/21/2007 | US20070139081 Address transition detector for fast flash memory device |
| 06/21/2007 | US20070139080 Single-ended CMOS signal interface to differential signal receiver loads |
| 06/21/2007 | US20070139079 Reducing power noise in differential drivers |
| 06/21/2007 | US20070139078 PCML driver for LVDS receiver loads |
| 06/21/2007 | US20070139077 Level shifter with reduced leakage current and block driver for nonvolatile semiconductor memory device |
| 06/21/2007 | US20070139076 Input/Output Circuit for Handling Unconnected I/O Pads |
| 06/21/2007 | US20070139075 Combined multiplexor/flop |
| 06/21/2007 | US20070139074 Configurable circuits with microcontrollers |
| 06/21/2007 | US20070139073 Pulsed flop with embedded logic |
| 06/21/2007 | US20070139072 Semiconductor integrated circuit device |
| 06/21/2007 | US20070139071 Configurable on-die termination |
| 06/21/2007 | US20070139070 Buffer having predriver to help improve symmetry of rise and fall transitions in an output signal |
| 06/21/2007 | DE102006050103A1 ZQ-Eichschaltung und Halbleitervorrichtung ZQ calibration circuit and semiconductor device |
| 06/21/2007 | DE102005059812A1 Electronic switch e.g. insulated gate bipolar transistor, switching method, involves increasing and/or decreasing potential of control terminal of switch up to target potential based on initial condition, and beyond target potential |
| 06/21/2007 | DE102005024955B4 Signalpegelumsetzungsschaltung zur Signalpegelverschiebung eines Logiksignals Signal level conversion circuit for signal level shifting a logic signal |
| 06/21/2007 | DE10152930B4 Stromrichter und Signalpegelumsetzer Converter and signal level converter |
| 06/20/2007 | EP1546947B1 Method and system for debugging using replicated logic |
| 06/20/2007 | CN1985440A Apparatus and methods for adjusting performance of integrated circuits |
| 06/20/2007 | CN1985439A Headswitch and footswitch circuitry for power management |
| 06/20/2007 | CN1983813A Non-reverse dominoes register and temporary storage method thereof |
| 06/20/2007 | CN1983812A Nano-pipeline multiplier based on differential load impedant device and CMOS circuit |
| 06/20/2007 | CN1322672C Non-volatile latch circuit and a driving method thereof |
| 06/19/2007 | US7234127 Integrated circuit designing support apparatus and method for the same |
| 06/19/2007 | US7234121 Method of fabricating an integrated circuit to improve soft error performance |
| 06/19/2007 | US7233639 Unfooted domino logic circuit and method |
| 06/19/2007 | US7233532 Reconfiguration port for dynamic reconfiguration-system monitor interface |
| 06/19/2007 | US7233471 Circuit output stage protection system |
| 06/19/2007 | US7233197 Methods and systems for reducing leakage current in semiconductor circuits |
| 06/19/2007 | US7233186 Clock generation circuit capable of setting or controlling duty ratio of clock signal and system including clock generation circuit |
| 06/19/2007 | US7233176 CMOS input buffer and a method for supporting multiple I/O standards |
| 06/19/2007 | US7233172 Differential amplifier circuit capable of accurately amplifying even high-speeded signal of small amplitude |
| 06/19/2007 | US7233170 Programmable driver delay |
| 06/19/2007 | US7233169 Bidirectional register segmented data busing |
| 06/19/2007 | US7233167 Block symmetrization in a field programmable gate array |
| 06/19/2007 | US7233166 Bus state keepers |
| 06/19/2007 | US7233164 Offset cancellation in a multi-level signaling system |
| 06/19/2007 | US7233045 Semiconductor device and system |
| 06/19/2007 | CA2434031C User configurable on-chip memory system |
| 06/14/2007 | WO2007067805A2 Dynamic constant folding of a circuit |
| 06/14/2007 | WO2007067684A2 Method of producing and operating a low power junction field effect transistor |
| 06/14/2007 | WO2007067423A2 Integrated circuit with configurable bypass capacitance |
| 06/14/2007 | WO2007066626A1 Electrostatic breakdown protection circuit and semiconductor integrated circuit device provided with same |
| 06/14/2007 | WO2007066456A1 Interface circuit |
| 06/14/2007 | WO2007047637A3 Improved audio synchronizer control and communications method and apparatus |
| 06/14/2007 | US20070136616 Memory card |
| 06/14/2007 | US20070132504 Semiconductor integrated circuit apparatus |
| 06/14/2007 | US20070132488 Data output circuit with reduced output noise |