Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
12/2007
12/04/2007US7304506 Differential output circuit and semiconductor device having the same
12/04/2007US7304505 Output buffer stage
12/04/2007US7304504 Output driver in semiconductor device
12/04/2007US7304503 Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability
12/04/2007US7304502 Level shifter and flat panel display comprising the same
12/04/2007US7304501 Method and apparatus for protecting a circuit during a hot socket condition
12/04/2007US7304500 Programmable logic module and upgrade method thereof
12/04/2007US7304499 Distributed random access memory in a programmable logic device
12/04/2007US7304497 Methods and apparatus for programmably powering down structured application-specific integrated circuits
12/04/2007US7304496 Mask-programmable logic device with programmable input/output ports
12/04/2007US7304495 Pseudodynamic off-chip driver calibration
12/04/2007US7304493 FPGA powerup to known functional state
11/2007
11/29/2007WO2007136928A2 Low profile managed memory component
11/29/2007WO2007136917A2 Managed memory component
11/29/2007WO2007135799A1 Signal processing circuit, level shifter, display panel driving circuit, display device, signal processing circuit
11/29/2007WO2007135795A1 Display device driving circuit, data signal line driving circuit, and display device
11/29/2007WO2007112329A3 Radiation hardened differential output buffer
11/29/2007WO2007022491A3 Integrated circuits with reduced leakage current
11/29/2007WO2005010198A3 Protein logic gates
11/29/2007US20070277161 System and Method for Programmable Logic Acceleration of Data Processing Applications and Compiler Therefore
11/29/2007US20070277141 Integrated Circuit Arrangement, and Method for Programming an Integrated Circuit Arrangement
11/29/2007US20070273408 Random Number Generation Based on Logic Circuits with Feedback
11/29/2007US20070273407 Data processing circuit
11/29/2007US20070273406 Input circuit for semiconductor integrated circuit
11/29/2007US20070273405 Voltage divider circuit
11/29/2007US20070273404 Mixed voltage input/output buffer having low-voltage design
11/29/2007US20070273403 Clock Tree For Programmable Logic Array Devices
11/29/2007US20070273402 Relational signaling and medium for high speed serial communications
11/29/2007US20070273401 Systems and Methods for Improved Fault Coverage of LBIST Testing
11/29/2007US20070273350 Pwm Drive Circuit
11/28/2007CN200983580Y An I2C level conversion circuit
11/28/2007CN101079622A Construction method and seven-value circuit of T-type network threshold-expansion any value general gate circuit
11/28/2007CN100352165C Semiconductor integrated circuit
11/28/2007CN100352164C Input Buffer circuit for reducing power consumption
11/28/2007CN100352163C Static selection circuit with high reliability and cow-power consumption
11/28/2007CN100351949C Data retention circuit
11/28/2007CN100351946C Magnet logic element and magnet logic element array
11/27/2007US7301533 Buffer circuit and active matrix display using the same
11/27/2007US7301372 Domino logic compatible scannable flip-flop
11/27/2007US7301371 Transmitter of a semiconductor device
11/27/2007US7301370 High-speed differential logic to CMOS translator architecture with low data-dependent jitter and duty cycle distortion
11/27/2007US7301368 Embedding memory within tile arrangement of a configurable IC
11/27/2007US7301367 Method and apparatus for providing a scheduler select multiplexer
11/27/2007US7301366 Tuning control for a PVT-compensating tunable impedance circuit
11/27/2007US7301365 On-chip source termination in communication systems
11/27/2007US7301363 Method and system for improving communication between logic elements in an integrated circuit
11/27/2007US7301362 Duplicated double checking production rule set for fault-tolerant electronics
11/27/2007US7299570 Wear assembly for an excavator
11/22/2007WO2007134135A2 System and method of silicon switched power delivery using a package
11/22/2007WO2007133899A1 System and method of power distribution control of an integrated circuit
11/22/2007WO2007078528A3 System, method and apparatus for distributing video-on-demand (vod)
11/22/2007US20070268044 Output buffer and method having a supply voltage insensitive slew rate
11/22/2007US20070268043 Apparatus and methods for self-biasing differential signaling circuitry having multimode output configurations for low voltage applications
11/22/2007US20070268042 Memory Based Computation Systems and Methods of Using the Same
11/22/2007US20070268041 Scalable non-blocking switching network for programmable logic
11/22/2007US20070268040 Logic circuit system and method of changing operating voltage of a programmable logic circuit
11/22/2007US20070268039 Programmable impedance control circuit calibrated at voh, vol level
11/21/2007EP1858073A1 Semiconductor integrated circuit, semiconductor integrated circuit control method, and signal transmission circuit
11/21/2007EP1856803A1 Wave shaping output driver to adjust slew rate and/or pre-emphasis of an output signal
11/21/2007EP1374106B1 Wireless programmable logic devices
11/21/2007CN200979265Y Frequency-changing air conditioner power module protection device
11/21/2007CN101076943A Structurization integrate circuit component
11/21/2007CN101076942A Semiconductor device and electronic apparatus using the same
11/21/2007CN101075808A Intelligent assembled gated circuit and JII quantum compiler
11/21/2007CN101075807A Circuit for controlling and allocating embryonic hardware reconfiguration
11/21/2007CN100350776C System, and method for extending range of a bidirectional data communication bus
11/21/2007CN100350747C Flip-flop circuit assembly
11/21/2007CN100350746C Pseudodynamic off-chip driver calibration
11/21/2007CN100350745C Semiconductor integrated circuit, logic operation circuit, and flip flop
11/21/2007CN100350744C Driver circuit and system including driver circuit
11/20/2007US7299495 Virus detection
11/20/2007US7299440 Semiconductor integrated circuit including standard cell, standard cell layout design method, and layout design software product stored in computer-readable recording medium
11/20/2007US7299389 Test circuit, integrated circuit, and test method
11/20/2007US7298837 Cross-over voltage lock for differential output drivers
11/20/2007US7298656 Process monitoring by comparing delays proportional to test voltages and reference voltages
11/20/2007US7298646 Apparatus for configuring programmable logic devices and associated methods
11/20/2007US7298627 Portable multi-source power inverter with pass through device
11/20/2007US7298182 Comparator using differential amplifier with reduced current consumption
11/20/2007US7298177 Method and mechanism to determine keeper size
11/20/2007US7298176 Dual-gate dynamic logic circuit with pre-charge keeper
11/20/2007US7298175 Low leakage power programmable multiplexers
11/20/2007US7298174 Circuit and method for generating an output signal
11/20/2007US7298173 Slew rate control circuit for small computer system interface (SCSI) differential driver
11/20/2007US7298172 Transmitter circuit, receiver circuit, interface circuit, and electronic instrument
11/20/2007US7298171 Layout area efficient, high speed, dynamic multi-input exclusive or (XOR) and exclusive NOR (XNOR) logic gate circuit designs for integrated circuit devices
11/20/2007US7298170 Safety system based on reconfigurable array of logic gates
11/20/2007US7298169 Hybrid logic/interconnect circuit in a configurable IC
11/20/2007US7298168 Method and apparatus for error mitigation of programmable logic device configuration memory
11/15/2007WO2007129557A1 Semiconductor integrated circuit
11/15/2007WO2007129259A2 Electronic circuit and method therefor
11/15/2007WO2007128682A1 Very low power analog compensation circuit
11/15/2007WO2007073767A8 Over-voltage and under voltage protection circuit
11/15/2007US20070262797 Driver circuit
11/15/2007US20070262793 Circuit configurations having four terminal JFET devices
11/15/2007US20070262792 Reduced glitch dynamic logic circuit and method of synthesis for complementary oxide semiconductor (CMOS) and strained/unstrained silicon-on-insulator (SOI)
11/15/2007US20070262791 Integrated Circuit to Store a Datum
11/15/2007US20070262790 Level shifting circuit for semiconductor device
11/15/2007US20070262789 Logic array devices having complex macro-cell architecture and methods facilitating use of same
11/15/2007US20070262787 Soft error tolerant flip flops
11/15/2007US20070262786 Fault tolerant asynchronous circuits
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