| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 02/27/2007 | US7185249 Method and apparatus for secure scan testing |
| 02/27/2007 | US7185225 Self-reparable semiconductor and method thereof |
| 02/27/2007 | US7184912 Memory device with apparatus for recalibrating output signal of internal circuit and method thereof |
| 02/27/2007 | US7183865 Oscillator circuit operating with a variable driving voltage |
| 02/27/2007 | US7183838 Semiconductor device having internal power supply voltage dropping circuit |
| 02/27/2007 | US7183827 Mixing prevention circuit for preventing mixing of semiconductor chips and semiconductor chip discrimination method |
| 02/27/2007 | US7183815 Drive apparatus for CCD image sensor |
| 02/27/2007 | US7183809 Current mode transmitter capable of canceling channel charge error |
| 02/27/2007 | US7183808 Circuit for power management of standard cell application |
| 02/27/2007 | US7183807 Method, apparatus and system of domino multiplexing |
| 02/27/2007 | US7183806 Output circuit |
| 02/27/2007 | US7183805 Method and apparatus for multi-mode driver |
| 02/27/2007 | US7183804 Process and device for outputting a digital signal |
| 02/27/2007 | US7183803 Input device for a semiconductor device |
| 02/27/2007 | US7183802 Semiconductor output circuit |
| 02/27/2007 | US7183801 Programmable logic auto write-back |
| 02/27/2007 | US7183800 Apparatus and methods for programmable logic devices with improved performance characteristics |
| 02/27/2007 | US7183799 Physically-enforced time-limited cores and method of operation |
| 02/27/2007 | US7183798 Synchronous memory |
| 02/27/2007 | US7183797 Next generation 8B10B architecture |
| 02/27/2007 | US7183796 Configuration memory implementation for LUT-based reconfigurable logic architectures |
| 02/27/2007 | US7183795 Majority voter apparatus, systems, and methods |
| 02/27/2007 | US7183794 Correction for circuit self-heating |
| 02/27/2007 | US7183792 Method and system for detecting a mode of operation of an integrated circuit, and a memory device including same |
| 02/22/2007 | WO2007022491A2 Integrated circuits with reduced leakage current |
| 02/22/2007 | WO2007022393A2 Memory row and column redundancy |
| 02/22/2007 | WO2007022350A2 Reference buffer with improved drift |
| 02/22/2007 | WO2007020709A1 Semiconductor device |
| 02/22/2007 | WO2006026627A3 On-chip power regulator for ultrta low leakage current |
| 02/22/2007 | WO2005107074A3 Integrated circuit with breakdown voltage multiplier |
| 02/22/2007 | US20070040717 System monitor in a programmable logic device |
| 02/22/2007 | US20070040597 Circuit for transforming signals varying between different voltages |
| 02/22/2007 | US20070040585 High speed, low power CMOS logic gate |
| 02/22/2007 | US20070040584 Dual-gate dynamic logic circuit with pre-charge keeper |
| 02/22/2007 | US20070040583 Semiconductor device |
| 02/22/2007 | US20070040582 Inferential power monitor without voltage/current transducers |
| 02/22/2007 | US20070040581 Word line driver with reduced leakage current |
| 02/22/2007 | US20070040580 Reference buffer with improved drift |
| 02/22/2007 | US20070040579 Swing limiter |
| 02/22/2007 | US20070040578 Input/output interface with current sensing |
| 02/22/2007 | US20070040577 Apparatus and methods for optimizing the performance of programmable logic devices |
| 02/22/2007 | US20070040576 Apparatus and methods for power management in integrated circuits |
| 02/22/2007 | US20070040575 Integrated circuits with reduced leakage current |
| 02/22/2007 | US20070040574 Apparatus and method for independent control of on-die termination for output buffers of a memory device |
| 02/22/2007 | US20070040573 Output impedance calibration circuit with multiple output driver models |
| 02/21/2007 | EP1755223A2 Apparatus and methods for optimizing the performance of programmable logic devices |
| 02/21/2007 | EP1755222A1 Logic cell having two isolated redundant outputs, and correspondant integrated circuit |
| 02/21/2007 | EP1755159A2 Semiconductor device |
| 02/21/2007 | EP1754163A2 Bus controller |
| 02/21/2007 | EP1754114A1 A method for portable plc configurations |
| 02/21/2007 | EP1219031B1 Integrated circuit including dedicated and programmable logic |
| 02/21/2007 | EP1097386B1 Adaptive driver with capacitive load sensing and method of operation |
| 02/21/2007 | CN2872737Y Electronic switching lock |
| 02/21/2007 | CN2872451Y Dynamic switching circuit of clock |
| 02/21/2007 | CN1918795A Latch circuit |
| 02/21/2007 | CN1918794A Differential driving circuit and electronic equipment including the same |
| 02/21/2007 | CN1917371A Apparatus and methods for optimizing the performance of programmable logic devices |
| 02/21/2007 | CN1917370A Receiver capable of increasing operation speed with suppressing increase of power consumption |
| 02/21/2007 | CN1301593C 半导体装置 Semiconductor device |
| 02/20/2007 | US7181718 Structures and methods providing columns of tightly coupled processor and RAM blocks within an array of logic blocks |
| 02/20/2007 | US7181543 Secure network identity distribution |
| 02/20/2007 | US7180792 Efficient latch array initialization |
| 02/20/2007 | US7180356 Semiconductor circuit |
| 02/20/2007 | US7180349 Frequency divider system |
| 02/20/2007 | US7180334 Apparatus and method for decreasing the lock time of a lock loop circuit |
| 02/20/2007 | US7180333 Current mode logic driver that employs a level shifting mechanism |
| 02/20/2007 | US7180332 Clock synchronization circuit |
| 02/20/2007 | US7180331 Voltage tolerant structure for I/O cells |
| 02/20/2007 | US7180329 Low-jitter adjustable level shifter with native devices and kicker |
| 02/20/2007 | US7180328 Apparatus and method for large hardware finite state machine with embedded equivalence classes |
| 02/20/2007 | US7180327 Memory module system with efficient control of on-die termination |
| 02/20/2007 | US7180326 Noise elimination circuit |
| 02/20/2007 | US7180324 Redundancy structures and methods in a programmable logic device |
| 02/20/2007 | US7179690 High reliability triple redundant latch with voting logic on each storage node |
| 02/15/2007 | US20070038971 Processing device with reconfigurable circuit, integrated circuit device and processing method using these devices |
| 02/15/2007 | US20070035332 Circuit and method for calculating a logical combination of two input operands |
| 02/15/2007 | US20070035331 Scan friendly domino exit and domino entry sequential circuits |
| 02/15/2007 | US20070035330 Columnar floorplan |
| 02/15/2007 | US20070035329 Look-up table based logic macro-cells |
| 02/15/2007 | US20070035328 Configurable logic element with expander structures |
| 02/15/2007 | US20070035327 Fast method for functional mapping to incomplete LUT pairs |
| 02/15/2007 | US20070035326 Memory chip and method for operating a memory chip |
| 02/15/2007 | DE10331607B4 Ausgangstreiber für eine integrierte Schaltung und Verfahren zum Ansteuern eines Ausgangstreibers Output driver for an integrated circuit and method for driving an output driver |
| 02/15/2007 | DE10084448B4 Selbstkompensierender Ausgangspuffer Self-canceling output buffer |
| 02/14/2007 | EP1753137A2 Wide range and dynamically reconfigurable clock data recovery architecture |
| 02/14/2007 | EP1753131A1 Device and method for limiting parasitic amplitudes |
| 02/14/2007 | EP1753031A1 Quantum device, quantum logic device, method of driving quantum logic device, and logic circuit by quantum logic device |
| 02/14/2007 | EP1751865A2 High speed clock distribution transmission line network |
| 02/14/2007 | EP1751864A2 Apparatus and method for shifting a signal from a first reference level to a second reference level |
| 02/14/2007 | EP1751763A2 Systems and methods for write protection of non-volatile memory devices |
| 02/14/2007 | EP1472789B1 Integrated circuit and battery powered electronic device |
| 02/14/2007 | EP1171810B1 Manipulation-proof integrated circuit |
| 02/14/2007 | CN1914731A Buffer circuit having electrostatic discharge protection |
| 02/14/2007 | CN1913356A Level shifter and a display device having the same |
| 02/14/2007 | CN1912860A Apparatus and methods for low-power routing in programmable logic devices |
| 02/14/2007 | CN1300945C Level inverter with automatic delay regulation function |
| 02/14/2007 | CN1300944C Multiple channel power supply control circuit |
| 02/14/2007 | CN1300943C Electric voltage carrying circuit |
| 02/13/2007 | US7178113 Identification of an integrated circuit from its physical manufacture parameters |
| 02/13/2007 | US7177385 Shift register for safely providing a configuration bit |