Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
09/2007
09/07/2007WO2007099467A1 Circuit arrangement and corresponding method for controlling and/or for preventing injection current
09/07/2007WO2007067423A8 Integrated circuit with configurable bypass capacitance
09/07/2007WO2006082458A8 Bus arbitration controller with reduced energy consumption
09/06/2007US20070206407 Spin Based Memory Coupled to CMOS Amplifier
09/06/2007US20070205820 Low-Power Consumption High-Voltage Cmos Driving Circuit
09/06/2007US20070205806 Open-drain output circuit
09/06/2007US20070205805 Electrical system including driver that provides a first drive strength and a second drive strength
09/06/2007US20070205804 Multi-bit configuration pins
09/06/2007US20070205803 System for signal routing line aggregation in a field-programmable gate array
09/06/2007US20070205802 Adjustable transistor body bias generation circuitry with latch-up prevention
09/06/2007US20070205801 Latch-up prevention circuitry for integrated circuits with transistor body biasing
09/06/2007US20070205800 High-voltage tolerant power-rail ESD clamp circuit for mixed-voltage I/O interface
09/06/2007US20070205799 Radiation hardened logic circuit
09/06/2007US20070205470 Low-power high-performance storage circuitry
09/06/2007DE10250818B4 Datenempfänger und Datenempfangsverfahren Data receiver and data receiving method
09/06/2007DE10245719B4 Datenempfänger und Datenempfangsverfahren Data receiver and data receiving method
09/05/2007EP1830252A2 Specialised processing block for programmable logic device
09/05/2007EP1829217A2 Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an fpga
09/05/2007EP1828896A2 High speed and low power sram macro architecture and method
09/05/2007EP1698054B1 Circuit element
09/05/2007CN101032077A High speed integrated circuit
09/05/2007CN101030766A Power reducing logic and non-destructive latch circuits and applications
09/05/2007CN101030147A Method and device for on-line programming logic device
09/05/2007CN100336303C Semiconductor apparatus
09/04/2007US7266632 Programmable logic device including programmable interface core and central processing unit
09/04/2007US7266062 Noise removal using 180-degree or 360-degree phase shifting circuit
09/04/2007US7265992 Negotiating electrical signal pathway compatibility between reconfigurable circuit modules
09/04/2007US7265692 Data compression system based on tree models
09/04/2007US7265589 Independent gate control logic circuitry
09/04/2007US7265588 Dynamic clock change circuit
09/04/2007US7265587 LVDS output buffer pre-emphasis methods and apparatus
09/04/2007US7265586 Programmable differential signaling system
09/04/2007US7265585 Method to improve current and slew rate ratio of off-chip drivers
09/04/2007US7265584 Voltage divider circuit
09/04/2007US7265583 Voltage level conversion circuit
09/04/2007US7265582 Level shifter
09/04/2007US7265581 Level shifter
09/04/2007US7265580 Semiconductor-integrated circuit utilizing magnetoresistive effect elements
09/04/2007US7265579 Field programmable gate array incorporating dedicated memory stacks
09/04/2007US7265578 In-system programming of non-JTAG device using SPI and JTAG interfaces of FPGA device
09/04/2007US7265577 Integrated circuits with RAM and ROM fabrication options
09/04/2007US7265576 Programmable lookup table with dual input and output terminals in RAM mode
09/04/2007US7265575 Nanotube-based logic driver circuits
09/04/2007US7265574 Fail-safe method and circuit
09/04/2007US7265573 Methods and structures for protecting programming data for a programmable logic device
08/2007
08/30/2007US20070201293 Testing method for permanent electrical removal of an integrated circuit output
08/30/2007US20070201268 Spin Based Magnetic Sensor
08/30/2007US20070200598 Low voltage output buffer and method for buffering digital output data
08/30/2007US20070200597 Clock generator having improved deskewer
08/30/2007US20070200596 Apparatus and methods for adjusting performance of programmable logic devices
08/30/2007US20070200595 Apparatus and method for reducing power consumption in electronic devices
08/30/2007US20070200594 High bandwidth reconfigurable on-chip network for reconfigurable systems
08/30/2007US20070200593 Digital circuit with dynamic power and performance control via per-block selectable operating voltage
08/30/2007US20070200592 Dynamic output buffer circuit
08/30/2007DE102006005779B3 Integrierte Schaltung und Betriebsverfahren hierfür Integrated circuit and operating method therefor
08/29/2007EP1826905A1 Electronic device for controlling an external load, in which the output signal slope is independent from the capacity of the external load, and corresponding integrated component
08/29/2007EP1826651A1 Internal voltage generator scheme and power management method
08/29/2007EP1730841A4 A scalable non-blocking switching network for programmable logic
08/29/2007CN101027838A Enhanced passgate structures for reducing leakage current
08/29/2007CN101027619A Internal voltage generator scheme and power management method
08/29/2007CN101026376A High performance level shift circuit with low input voltage
08/29/2007CN101025731A Computing system
08/29/2007CN101025535A Liquid crystal display
08/29/2007CN100334806C Shift temporary storage and shift temporary storage group using it
08/29/2007CN100334805C 输出延迟电路 Output of the delay circuit
08/29/2007CN100334729C Semiconductor integrated device and apparatus for designing the same
08/28/2007US7262643 Semiconductor integrated circuit controlling output impedance and slew rate
08/28/2007US7262637 Output buffer and method having a supply voltage insensitive slew rate
08/28/2007US7262636 Method and system for a circuit for timing sensitive applications
08/28/2007US7262635 Interconnection resources for programmable logic integrated circuit devices
08/28/2007US7262634 Methods of reducing power in programmable logic devices using low voltage swing for routing signals
08/28/2007US7262633 Via programmable gate array with offset bit lines
08/28/2007US7262632 Signal measurement systems and methods
08/28/2007US7262631 Method and apparatus for controlling a voltage level
08/28/2007US7262630 Programmable termination for single-ended and differential schemes
08/28/2007US7262629 Apparatus and method for protecting from illegal copy
08/23/2007WO2007094571A1 Capacitive coupling type level shift circuit of low power consumption and small size
08/23/2007WO2007094133A1 Arithmetic processing circuit using ferroelectric capacitor and arithmetic method
08/23/2007WO2007093956A1 Transformation of an input signal into a logical output voltage level with a hysteresis behavior
08/23/2007WO2007093598A1 Integrated circuit
08/23/2007WO2007075962A3 Programmable logic device with serial interconnect
08/23/2007WO2001046988A3 Method and apparatus for routing 1 of n signals
08/23/2007US20070198962 Semiconductor integrated circuit and method of designing layout of the same
08/23/2007US20070194841 Semiconductor integrated circuit device
08/23/2007US20070194836 Precharged power-down biasing circuit
08/23/2007US20070194810 Locally asynchronous, block-level synchronous, configurable logic blocks with sub-threshold analog circuits
08/23/2007US20070194809 Output Stage with Low Output Impedance and Operating from a Low Power Supply
08/23/2007US20070194808 High-performance static programmable logic array
08/23/2007US20070194807 Packet-oriented communication in reconfigurable circuit(s)
08/23/2007US20070194806 Reconfigurable digital logic unit
08/23/2007US20070194805 Data output driving circuit of semiconductor memory apparatus
08/23/2007US20070194804 Electronic device and method
08/23/2007US20070194767 Step-down circuit with stabilized output voltage
08/23/2007US20070194377 Thin film semiconductor device and manufacturing method
08/22/2007EP1821410A2 Signal output circuit and semiconductor integrated circuit
08/22/2007EP1821409A1 Current control technique
08/22/2007EP1820273A2 Electronic device having logic circuitry and method for designing logic circuitry
08/22/2007EP1716641A4 Upgradeable and reconfigurable programmable logic device
08/22/2007EP1584138A4 Apparatus and method of error detection and correction in a radiation-hardened static random access memory field-programmable gate array
08/22/2007EP1481309B1 Low jitter clock for a multi-gigabit transceiver on a field programmable gate array
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